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RESEARCH ARTICLE
Copyright © 2019 American Scientific Publishers
All rights reserved
Printed in the United States of America
Journal of
Computational and Theoretical Nanoscience
Vol. 16, 2628–2634, 2019
Design and Analysis of Receiver Front-End of CMOS
Cascode Common Source Stage with Inductive
Degeneration Low Noise Amplifier on
65 nm Technology Process
Mahesh Mudavath
1 ∗
and K. Hari Kishore
2
1
Research Scholar, K L University, Guntur District, Vaagdevi College of Engineering, Warangal 522502, India
2
Department of Electronics and Communication Engineering, K L University, Vaddeshwaram,
Guntur District 522502, Andhra Pradesh, India
This manuscript presents a design approach of a cascode Common Source stage with Inductive
Degeneration (CS-ID) LNA in 65 nanometer CMOS Technology and operates at 2.4 GHz. This
selected topology provides high power gain of 25 dB and noise figure below 2.6 dB at a supply
voltage 1 V. The cascode CS-ID gives perfectly matched with input/output impedance of 50 and it
is verified with input and output reflection coefficients S
11
=−151 dB and S
22
=−162 dB. The low
noise amplifier is designed to be used as cascode stage of a receiver for wireless communication.
The simulations are finished by using cadence virtuoso Spectra RF. The cascode stage with high
gain and low noise figure can be used for wireless applications such as IEEE 802.15.4 standard is
commonly recognized as ZigBee, it be a low tier, ad hoc, terrestrial, wireless standard in few ways
analogous to Bluetooth.
Keywords: Radio Frequency, Cascode CS-ID LNA, Power Gain, Noise Figure, CMOS Scaling
65 Nanometer, 2.4 GHz Frequency, ZigBee, Bluetooth, IEEE 802.15.4 Standards.
1. INTRODUCTION
The wireless communication industry is at this time expe-
riencing remarkable growth. In responding to the require
for a low-cost but high performance wireless front-end,
several exhaustive researches on CMOS radio-frequency
(RF) front-end circuits have been carried out [1]. The vital
goal is to diminish the trade-off between high performance
and low-cost, low power consumption design [2].
Low noise amplifier (LNA) is generally the first stage of
a receiver [3]. Its performance appreciably affects the over-
all receiver performance. In this paper, cascode Common
Source stage with inductive degeneration topology of LNA
is proposed [4]. It is designed for the IEEE 802.15.4 stan-
dard covers 3 frequency bands, i.e., 860 MHz, 920 MHz,
and 2.4 GHz. The trendy 2.4 GHz industrial, scientific,
and medical (ISM) band was elected for this proposed
work because it is an unlicensed band and is accepted
worldwide [5]. The IEEE 802.15.4 standard [6] is gen-
erally recognized as ZigBee, it is a low tier, ad hoc,
terrestrial, wireless standard in some ways analogous to
Bluetooth [7].
∗
Author to whom correspondence should be addressed.
In summary, the important features in the design of an
LNA shown in Figure 1; nowadays receiver architectures
are: NF, gain, input impedance matching, power consump-
tion, reverse isolation, chip size and linearity.
In this manuscript, low noise amplifier [8–9] for RF
front-end is deliberate with high gain, low noise figure and
perfect input and output impedance matching using 65 nm
technology in cadence. The primary challenge of LNA is
to provide better performance.
This manuscript follows Section 2 gives concept of Low
Noise Amplifier. In Section 3 takes design considerations
of LNA. In Section 4 presents LNA design and simulation
results. Finally Section 5 concludes the work.
2. CONCEPT OF LOW NOISE AMPLIFIER
The signal conveyed by radio wire in ongoing remote
frameworks can be in the submicrovolt (V) run under-
scores the intense requirement for low clamor enhance-
ment [10]. The low clamor speaker is the primarily
significant segment to repay the commotion figure in a
RF front-end collector segment appeared in Figure 2. The
key in plan parameters of LNA are the high increase, low
2628 J. Comput. Theor. Nanosci. 2019, Vol. 16, No. 5/6 1546-1955/2019/16/2628/007 doi:10.1166/jctn.2019.7942