Development of the readout ASIC for the 144ch HAPD for aerogel RICH Shohei Nishida a, , Ichiro Adachi a , Rok Dolenec b , Hirokazu Ikeda c , Samo Korpar b , Eiryo Kuroda d , Yuichi Miyazawa e , Isao Nishizawa d , Rok Pestotnik b , Takayuki Sumiyoshi d , Yasuo Ueki d a High Energy Accelerator Research Organization (KEK), Tsukuba, Japan b Jozef Stefan Institute, Ljubljana, Slovenia c Japan Aerospace Exploration Agency (JAXA), Sagamihara, Japan d Tokyo Metropolitan University, Tokyo, Japan e Tokyo University of Science, Noda, Japan article info Available online 7 March 2010 Keywords: ASIC Front-end electronics Photo-detector RICH Particle identification Belle abstract We have developed an ASIC for readout of a 144 channel HAPD (hybrid avalanche photo-detector), one of the candidate photo-detectors for use in the aerogel RICH detector of the Belle upgrade (Belle-II). The first series of ASICs for evaluation showed good performance, and have been used to successfully detect Cherenkov rings with a prototype aerogel RICH device. We are also developing a new version of the ASIC for real application at the Belle-II detector. & 2010 Elsevier B.V. All rights reserved. 1. Introduction Belle is a B factory experiment [1] started in 1999 at the KEKB collider [2] to confirm the Kobayashi–Maskawa theory and study various B, charm and t physics. In this experiment, particle identification (PID), particularly discrimination between kaons and pions, is important. In Belle, a threshold-type Cherenkov detector utilizing aerogel radiator (ACC) [3] is used for p=K separation above 1 GeV/c. However, the ACC does not provide separation for high momentum particles around 4 GeV/c in the forward end-cap region. Therefore, we are developing a PID device for the future upgrade to the Belle experiment (Belle-II) which will consist of a ring imaging Cherenkov detector (RICH) with aerogel radiator [4], and will provide around 5sp=K separation in a kinematic region ranging from 1 to 4 GeV/c [5]. The photo-detector used in this aerogel RICH must be able to detect single photons, have position sensitivity with a granularity of around 5 Â 5 mm 2 , and provide a large effective area of coverage in the forward region of Belle (around 4 m 2 ). It also must be immune to a 1.5 T magnetic field perpendicular to the photon detection plane. One such candidate photo-detector is a 144 channel hybrid avalanche photo-detector (HAPD) developed in collaboration with Hamamatsu Photonics K. K. (HPK). Because the HAPD has relatively low gain (around 10 5 ) compared to conventional photo-multipliers, high-gain and low- noise electronics are required to readout the HAPD signal. The readout need only provide a single bit of on/off hit information for each channel, but the total number of channels is around 10 5 . In order to cope with this large channel count, we have developed an ASIC for the front-end electronics of the HAPD. 2. HAPD readout with the ASIC We first produced a series of ASICs for evaluation at the VLSI Design and Education Center (VDEC) of the University of Tokyo using the ROHM CMOS 0:35 mm process. The ASIC consists of a charge- sensitive preamplifier, a shaper and a variable gain amplifier (VGA), followed by a comparator for the digitization of analog signals to on/ off hit information, and a digital shift register for pipelined readout. The amplification factor of the preamplifier can be set to either 5 or 10 V/pC, while the gain of the VGA can be varied between 1.25 and 20. The shaping time is also variable between 0.3 and 2:0 ms. The target noise level is 1200e at 80 pF, which corresponds to a signal- to-noise ratio of 10, assuming an HAPD gain of 12 000. Each chip has 18 channels, so we need eight chips to read out one HAPD. The threshold voltage for the comparator is common to all channels, but the offset voltage can be adjusted for each channel in the range of 160 to 150 mV using a 5-bit DAC. This offset can be used to adjust for small differences in baseline voltage among channels, and can also be used to vary the effective threshold voltage of each channel. We performed four iterations of production since 2003. The performance of the ASIC can be evaluated by varying the threshold voltage and measuring the hit rate using the one-bit digital output using a test pulse input. Fig. 1 shows the measured dependence of the noise level on capacitance. The noise level at 80 pF is measured to be around 1900 e , which is higher than the Contents lists available at ScienceDirect journal homepage: www.elsevier.com/locate/nima Nuclear Instruments and Methods in Physics Research A 0168-9002/$ - see front matter & 2010 Elsevier B.V. All rights reserved. doi:10.1016/j.nima.2010.03.051 Corresponding author. E-mail address: shohei.nishida@kek.jp (S. Nishida). Nuclear Instruments and Methods in Physics Research A 623 (2010) 504–506