Jurnal Rekayasa Elektrika Vol. 8, No. 2, Oktober 2009 49 A Novel Implementation of Discontinuous SVPWM with Hardware Resource Saving Based on FPGA Tole Sutikno 1 , Nik Rumzi Nik Idris 2 1 Department of Electrical Engineering, Faculty of Industrial Technology Universitas Ahmad Dahlan (UAD), Yogyakarta 55164, Indonesia 2Department of Energy Conversion, Faculty of Electrical Engineering Universiti Teknologi Malaysia (UTM), 81310 Johor, Malaysia e-mail: thsutikno@gmail.com Abstract— There has been reported some discontinuous Space Vector Pulse Width Modulation (SVPWM) methods to decrease the switching losses that usually occur in the 7- segment continuous conventional SVPWM. However, not all methods have low switching losses, simple algorithm and can be implemented to Field-Programmable Gate Array (FPGA) easily. This paper presents the design and realization of a novel symmetric 5-segment discontinuous SVPWM based on FPGA with a different approach, in which the judging of sectors and the calculation of the firing time to generate the SVPWM waveform is simple, and also the switching losses is low. The proposed SVPWM method has successfully implemented by using APEX20KE Altera FPGA and considering hardware resource saving. The method is implemented without computing trigonometric functions to determine number of sectors and the commutation patterns. The proposed SVPWM has programmed to FPGA successfully in the carrier frequency 20 kHz with minimum harmonic distortion. Kata Kunci. discontinuous SVPWM, hardware resource saving, FPGA I. INTRODUCTION The Space Vector Pulse Width Modulation (SVPWM) method is an advanced PWM method for variable frequency drive applications. In recent years, this method gradually obtains widespread applications in the power electronics and the electrical drives, because of its superior performance characteristics. If it is compared to the Sinusoidal Pulse Width Modulation (SPWM), the SVPWM is more suitable for digital implementation and can increase the obtainable DC voltage utilization ratio very much. Moreover, it can obtain a better voltage total harmonic distortion factor [1-4]. Up to now, its theories and algorithms have been well developed and applied more widely with the progress of power electronics. However, the conventional SVPWM suffers from the drawbacks like computational burden, inferior performance at high modulation indices and high switching losses of the inverter. Hence to reduce the switching losses and to improve the performance in high modulation region, several discontinuous SVPWM methods have been proposed [5-7]. Furthermore, the SVPWM algorithms which are mainly implemented with software based on microcontroller or digital signal processors (DSP) are widely adopted in most engineering practice. They perform control procedure sequentially by exploiting their mathematically oriented resources. That is the instructions of different procedures are executed one after the other. Thus, the purely software- based technique is not an ideal solution. Employing Field Programmable Gate Array (FPGA) to realize SVPWM strategies provides advantages such as rapid prototyping, simpler hardware and software design, and higher switching frequency. Differ from software implementation, FPGA performs the entire procedures with concurrent operation (parallel processing by means of hardware mode and not occupying) by using its reconfigurable hardware. For its powerful computation ability and flexibility, an FPGA is considered as an appropriate solution to boost system performance of a digital controller including an SVPWM algorithm [2, 8-11]. Although the literatures of the implementation for three- phase SVPWM based on FPGA is not lacking, the designs are based on the conventional SVPWM without considering hardware resource saving. In this paper, we design and implement a FPGA based SVPWM with a different approach, in which the judging of sectors and the calculation of the firing time to generate the SVPWM waveform is simple, and also the switching losses is low. In this paper, a novel 5-segment discontinuous SVPWM design based on the basic idea from [4] and [12] is proposed. This proposed method has lower switching losses, simpler algorithm and can be implemented easily based on APEX20KE Altera FPGA. II. THE PRINCIPLES OF CONVENTIONAL SVPWM The main aim of any modulation technique is to obtain variable output having a maximum fundamental component with minimum harmonics and less switching