FPGA-based Real-Time Reconfigurable Architectures for Wireless Monitoring and Control Marco Caccamo The proliferation of computing systems into all walks of life has led to significant improvements (savings in time and cost) in the manner in which we perform our day-to-day activities. This trend continues unabated with the embedding of computing systems into many physical objects. The fusion of computing environments with the physical environment places extraordinary emphasis on the convergence of computation, communication and control. A compelling example can be found considering next generation of automated systems for assisted living. Example: Imagine a situation where an elderly person suffers a fall or some other incident that requires medical attention. A series of sensors (RFIDs, accelerometers, etc.) on the property can track movements within the premises and, when a critical condition is detected, these sensors can communicate information using one or multiple hops to a base station that can then request 911 services. These situations may also lead to the activation of audio/video devices that can provide a live feed to paramedics who can prepare for the ideal treatment en route to the incident site. These sensors need not be powered up at all times to minimize energy costs and for privacy; they can be activated on demand. To this end, some embedded nodes can be reconfigured to process audio/video streams in conjunction with the regular activities they carry out. Much progress has been made in the individual domains of sensing and signal processing, in scheduling of activ- ities and in real-time control, however more research is needed to create a system infrastructure in which computing devices work in complete harmony with sensors and actuators. Notice that communication will have to be wireless because it is hard to wire numerous devices. In addition, when devices are used to handle a variety of events, they need to be reconfigured, based on contextual information, to meet the changing requirements of the different tasks and always deliver high quality of service. To develop a methodology for building “smart” environments (from building-wide to large scale deployments in open spaces), several contexts are considered that exhibit most of the characteristics that need to be analyzed. The first is smart buildings with support for assisted living. At a larger scale, there is industrial automation that requires additional support for processes to tackle power conservation, maintenance and testing, to mention a few operational dimensions. Lastly, there are Wireless Multimedia Sensor Networks (WMSNs) that can be envisioned as next generation multi-hop wireless ad-hoc networks: their sensor nodes are equipped with microphones/cameras. WMSNs will allow to establish real-time streams on demand [2, 1] and will greatly enhance existing surveillance and monitoring systems (for border control, airports security, assisted living, etc.). There are some observations that we can make from the above described scenarios (assisted living, industrial automation, wireless multimedia sensor networks). First, the system requires end-to-end real-time performance, with computation and communication, to ensure timely response within bounded delay, and delivery of time-sensitive data to a remote control center. The described applications are heavily event-driven and part of the run-time workload is very dynamic with transient high computational demands: reserving resources for the worst-case scenario will lead to dramatic under-utilization of resources in many situations and raise unit costs. Due to the intrinsic dynamic activation of tasks, static task allocation on specialized hardware is not a good solution; at the same time, general purpose processors cannot deliver the best performance. We believe that utilizing a general-purpose CPU and a partially reconfigurable device [4] (using Field Programmable Gate Arrays) at aggregation points, routers and for data processing, can constitute an innovative solution for distributed real-time systems, combining the flexibility of general purpose systems with the high performance of hardware-only solutions. We plan to explore devices like the Xilinx Virtex-II Pro and Virtex-4 family of FPGAs [7] – which offer reconfigurable computing on chip. An Operating System for Reconfigurable Devices (OSRD), for which several prototypes have been proposed [3, 5, 6], can be used to manage the entire system, and suits complex real-time monitoring and surveillance applications. For the successful design and development of next generation embedded, reconfigurable, real-time wireless sys- tems, some of the main research questions to be answered are “When and how should device reconfiguration be performed?”, “How does one provide timely messages over a shared multi-hop wireless medium?” and “Given a multi-hop network, what utilization conditions indicate, almost surely, the feasibility of real-time communication?” We aim at handling these challenges by investigating different layers of the system architecture: 1) device-level man- agement that permits dynamic reconfiguration (on FPGA) using specialized hardware and OS support; 2) real-time device inter-networking over an ad-hoc wireless infrastructure; 3) workload thresholds for real-time multi-hop net- works that will permit high-level management and provisioning of the system. 1