In x Ga 1-x Sb n-channel MOSFET: Effect of Interface States on C-V Characteristics Muhammad Shaffatul Islam 1* , Md. Nur Kutubul Alam 1 . Md. Rafiqul Islam 1 1 Department of Electrical and Electronic Engineering Khulna University of Engineering & Technology Khulna-9203, Bangladesh *Corresponding author : mashru.islam@yahoo.com ABSTRACT The Capacitance-Voltage (CV) characteristics of InGaSb based n-MOSFET are investigated by quantum mechanical calculation solving 1D self-consistent Schrodinger-Poisson equation using Silvaco’s ATLAS device simulation package. The charge density profile is determined by wave function penetration effect within the oxide layer and Neuman boundary condition. Low and high frequency CV characteristics are studied both for the positive and negative interface charge densities. The results obtained from the simulation demonstrate that the CV characteristics are not so sensitive in the shift of threshold voltage for high frequency operation. On the other hand, a significant shift in threshold voltage is noticed for the low frequency operation and the shift is entirely depends on the density of interface charge density and its type. INTRODUCTION Silicon is the most widely used semiconductor in digital logic applications. As silicon based devices are scaling down to their ultimate limits , some adverse effects arise which degrade the device performance. For the limitation of the silicon and quest for better performing material, researchers are looking into the possibilities of CMOS circuits that utilize III-V material either alone or in hybrid form with Si or Ge [1]. III-V materials have emerged as a promising candidate for channel material of MOSFET to be used in future logic applications due to excellent electron and transport properties [2]. Since the modern complementary metal oxide semiconductor technology is aggressively scaling down, the device dimension and the thickness of the material has also been scaled [3]. For compensating gate leakage and good control over electrostatic potential, High-k oxides are suitable. In scaled down III-V devices High-K gate oxide integration on compound semiconductor is a challenging issue. The low quality interface can generate interface states in the oxide- semiconductor interface. The generation of interface trap states at oxide/semiconductor interface and oxide trapped charge of MOS structures has long been demonstrated as the prime factors behind the degradation of MOS device performances [4,5]. When bias is applied on the gate at elevated temperature or for long time, an increase in oxide trap charge density causes the shift in threshold voltage and decrease in carrier mobility. However, charge trapping induced through bias is extremely high in high-k gate stacks because of high densities of intrinsic defect in material [6.7]. The bias-induced charging and discharging greatly influence the device performance by reducing the drive current due to electrostatic interaction with trapped charges [8].This kind of degradation on device parameters can led to circuit failures in analog and digital applications [5]. Among all the III-V semiconductors, antimonide based materials have higher electron mobility and can be used as a potential material in the channel of MOSFET. Recently, InGaSb-based surface channel p-MOSFET [2] and n-MOSFET [9] was experimentally demonstrated. In this study logic figure of merits (e.g. SS,DIBL,I ON /I OFF ratio) and mobility for p-MOSFET and channel mobility behavior for n-MOSFET has been investigated. Self-Consistent capacitance-voltage (CV) characterization was reported considering direct tunneling gate leakage current for InGaSb n-channel MOSFET in[10]. To best of our knowledge there is no study on effect of interface states on InGaSb n-channel MOSFETs including the CV characteristics. In this work coupled Schrodinger and Poisson equations have been solved self consistently [11] in order to calculate the quantum mechanical charge distribution in MOS devices incorporating wave function penetration effect within the oxide layer using SILVACO’s ATLAS device simulation package. The solver employs Finite Element Method. The CV characteristics are calculated using the electrostatics of the device revealed by the solver. The results obtained from the simulation indicate that the density of interface states and its type have significant influence on the shift in threshold voltage for low frequency (LF) operation. However, at the high frequency (HF) operation, the shift in threshold is found to be almost negligible with interface states. SELF CONSISTENT MODELING A. Device Structure Fig. 1 Proposed In x Ga 1-x Sb surface channel MOSFET structure. Al Al 2 O 3 In x Ga 1-x Sb Channel S D GaAs Substrate Al x Ga 1-x Sb Buffer 197 978-1-4673-4842-3/13/$31.00 c 2013 IEEE