NoCGen – UMA FERRAMENTA PARA GERAÇÃO DE REDES INTRA-CHIP BASEADA NA INFRA-ESTRUTURA HERMES Fernando G. Moraes , Luciano C. Ost, Aline V. Mello, José C. Palma, Ney L. Calazans Pontifícia Universidade Católica do Rio Grande do Sul (FACIN-PUCRS) Av. Ipiranga, 6681 - Prédio 30 / BLOCO 4 - 90619-900 - Porto Alegre – RS – BRASIL {moraes , ost, alinev, jpalma, calazans}@inf.pucrs.br SUMMARY The technology evolution allows increasing the number of IP cores at the same integrated circuit. This increasing drives the research of new intra-chip interconnection infrastructure, which must allow the communication requirements for future SoCs: reusability, scalability, and parallelism. A network on chip draws on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. The reusability of intra- chip interconnection infrastructure and IP cores are seen as a needed feature to enable future SoC designs. However, increasing the reusability design, the external interfaces of the IP cores and the intra-chip interconnection infrastructure must be standards. In this context, the present work focus the implementation of a tool which allows the generation of parameterizable NoCs based on infrastructure called HERMES. Besides the NoCs generation, the implemented tool called NoCGen, has the following characteristics: (i) testbench generation; (ii) traffic generation; (iii) traffic analyze and (iv) generation of network interface based on OCP protocol.