The Integrated Design of a MEMS-based Flow-Sensor System Nicolas André, Université catholique de Louvain, Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Louvain-la- Neuve, Belgium Laurent A. Francis, Université catholique de Louvain, Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Louvain-la- Neuve, Belgium Jean-Pierre Raskin, Université catholique de Louvain, Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Louvain-la- Neuve, Belgium Philippe Nachtergaele, Open Engineering, R&D, Liège, Belgium Jean-Marc Vaassen, Open Engineering, R&D, Liège, Belgium Joe Civello, Agilent Technologies, Agilent EEsof EDA, Santa Rosa CA, USA Sébastien Cases, SoftMems, Grenoble, France Stéphane Paquay, Open Engineering SA, Liège, Belgium Erwin De Baetselier, Open Engineering SA, Liège, Belgium 1 Abstract A high level of functional integration is critical for successfully building smart systems. Existing design flows focus mostly on system level integration. However, to capture all multiphysics interactions and optimize the sensitivity of a smart transducer system such as a MEMS shear stress flow sensor based on capacitive effects, it is important to simulate the fluid-structure interactions (FSI) together with the electronics circuitry. To interface extremely small capacitance variations (several hundred femtoFarads depending on the out-of-plane beam deflection) from a capacitive transducer, co- integration of the MEMS transducer with an integrated read-out integrated circuit (IC) is mandatory to minimize parasitic elements and thus provide high resolution. We need to ensure the system's performance with regards to sensitivity, low consumption in view of high autonomy, reliability for extended lifetime while limiting its cost. For that we opted for a SoC (System-on-Chip) technology. We have co- integrated the sensor with its electronic interface using thin film SOI technology wafers and traditional CMOS-compatible layers. We demonstrate a design and process flow for integrated 3D MEMS/IC, able to address complex multi-technology and multi-physics challenges on the MEMS/IC as well as the packaging level. 2 Introduction Co-integration of CMOS circuits and MEMS within a single package is often seeked to improve sensors performance or integration level while cutting down the production costs. To interface extremely small capacitance variations (several