Synthesis of Reversible Circuits from a Subset of Muthukrishnan-Stroud Quantum Realizable Multi-Valued Gates Nicholas Denler *, Bruce Yen *, Marek Perkowski *, Pawel Kerntopf + * Department of Electrical and Computer Engineering, Portland State University, 1900 SW 4 th Avenue, Portland, OR 97201, USA. mperkows@ee.pdx.edu + Institute of Computer Science, Department of Electronics and Information Technology, Warsaw Univ. of Technology, Nowowiejska 15/19, 00-665 Warsaw, Poland, pke@ii.pw.edu.pl Abstract We present a new type of quantum realizable reversible cascade. Next we present a new algorithm to synthesize arbitrary single-output ternary functions using these reversible cascades. The cascades use “Generalized Multi-Valued Gates” introduced here, which extend the concept of Generalized Ternary Gates introduced previously. While there were 216 GTGs, a total of 12 ternary gates of the new type are sufficient to realize arbitrary ternary functions. (The count can be further reduced to 5 gates, three 2-qubit and two 1-qubit). Such gates are realizable in quantum ion trap devices. For some functions, the algorithm requires fewer gates than results previously published [1, 5, 8, 14]. In addition, the algorithm also does conversion from arbitrary ternary logic to reversible logic at the cost of relatively small garbage. The algorithm is implemented here in ternary logic, but generalization to arbitrary radix is both straightforward and sees a reduction in growth of cost as the radix is increased. 1. Introduction Reversible logic [16] is a promising approach to reduce power consumption in several emerging technologies. It is also a base of quantum circuits [12, 3]. There is a recent interest in multiple-valued quantum computing. It has been shown that most of 2x2 ternary reversible functions are universal [6]. Which family, then, of the numerous universal gates are a good choice for synthesis with respect to high processing power, low gate count cost, and simplicity of design? Picton [15] proposed reversible MV gates which were not efficient to realize, especially using quantum primitives, and lead to inefficient structures. No synthesis method was given. Several new MV reversible gates and respective circuit structures were proposed in [1, 2] but the issue of their quantum realization was not addressed and in some designs the garbage may be high. De Vos proposed two universal 2*2 ternary gates [4] together with two 1*1 permutative ternary gates. Two universal quantum gates (more general than permutative reversible gates) have been proposed by Stroud and Muthukrishnan. Their paper [11] presents realization of such gates in ion trap technology. Based on gates of De Vos and Stroud/Muthukrishnan, we proposed [13, 14] a set of gates that generalize De Vos gates and generalize one particular realization (permutative) of Stroud/Muthukrishnan gates. It was shown in [13, 14] how a ternary Toffoli gate can be build from our Generalized Ternary Gates (GTGs). Synthesis of ternary permutative quantum cascades from ternary counterparts of Toffoli and Feynman gates was discussed in [8]. However, such circuits can be highly non-minimal when the Toffoli-like multiple- valued gates (which are not directly quantum-realizable) are built using GTG gates, or using physically realizable gates from [6]. Therefore, recently we became interested in synthesis of ternary reversible cascades directly from GTG gates and their special cases, as well as with new realizable generalizations of GTG gates [7]. We believe that synthesis algorithms should be created only for gates about which we know that they are quantum-realizable and we can at least approximate their real realization costs. In this paper, we propose an algorithm to systematically synthesize an m-valued (in particular, ternary) function with an arbitrary number of inputs, [14]. The synthesized implementation is a cascade of Generalized Multiple-Valued Gates (GMVGs) of arbitrary radices. In ternary case, the gates are special cases of GTGs. While there were 216 GTGs, a total of 12 ternary gates of the new type are sufficient to realize arbitrary ternary function. (The count can be further reduced to 5 gates, three 2-qubit and two 1-qubit). Some 1-qubit permutation gates [7, 8, 9, 14] that are more difficult to realize as quantum primitives are now avoided. We present experimental results that show the complexity and cost of the implementations on ternary benchmark functions from [9]. The paper is organized as follows: section 2 presents background on the new gates. The minimization technique for multi-valued expressions (and in particular, ternary expressions) discussed in Section 3 is entirely different from previous methods [9, 1, 2, 13, 8, 7] and is efficient. The basic algorithm is next enhanced in Section 4. In section 5 we present some experimental results of ternary benchmark functions using both the basic and the enhanced algorithms. We also discuss the complexity and cost functions of the enhanced algorithm. Finally, we draw some conclusions and discuss future work to be done in this area. This paper