IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 2, Issue 4 (May. – Jun. 2013), PP 21-25 e-ISSN: 2319 – 4200, p-ISSN No. : 2319 – 4197 www.iosrjournals.org www.iosrjournals.org 21 | Page Charge Pump, Loop Filter and VCO for Phase Lock Loop Using 0.18μm CMOS Technology Kashyap K. Patel 1 , Nilesh D. Patel 2 , Kruti P. Thakore 3 , 1 (PG Student, L.C Institute of Technology, Bhandu, India) 2 (Assistant Professor, L.C Institute of Technology, Bhandu, India) 3 (Assistant Professor EC, LDRP, Gandhinagar, India) Abstract : This paper presents a Low power charge pump, second order low pass filter and voltage controlled oscillator for low power phase lock loop. The paper contains the detailed circuit diagram of charge pump, loop filter and voltage control oscillator with 1.8v power supply. The design has been realized using 0.18um CMOS technology. Here current starved voltage control oscillator is use for phase lock loop. Keywords: - charge pump, second order low pass filter, voltage control oscillator I. INTRODUCTION Digital Phase locked loop (PLL) is one of the most inevitable necessities in modern day electronic systems. It finds widespread applications in generation and synchronization of well timed clocks ,recovery of signal from noisy communication channel, FPGA„s, communication systems, frequency-synthesizer, trans- receivers. Since a PLL can be incorporated in a single chip, it is highly preferred. low power DPLL is becoming essential for portable and battery operated compact electronics device, which decreases the risk of reliability problems. The Phase Lock Loop plays the versatile roles in the application of clock generation, time synchronization and clock multiplication. A basic block diagram of PLL is introduced in Fig 1. It consist five main blocks 1) Phase Frequency Detector (PFD) 2) Charge Pump (CP) 3) Low Pass Filter 4) Voltage Controlled Oscillator (VCO) 5) Divided by N Counter. In this paper improve the circuit of charge pump, loop filter, current starved VCO. The paper is organized as follows, Section II contains charge pump, Section III second order low pass filter and Section VI Voltage Controlled Oscillator. Fig 1 A Basic Block Diagram of Phase Locked Loop [1] II. CHARGE PUMP Charge pump is the next block to the phase frequency detector. The output signals - UP signal and DOWN signal generated by the PFD is directly connected to the charge pump. The main purpose of a charge pump is to convert the logic states of the phase frequency detector into analog signals suitable to control the voltage-controlled oscillator (VCO). Basically, the charge pump consists of current sources and switches. The output of the charge pump is connected to a low pass filter that integrates the charge pump output current to an equivalent VCO control voltage (Vcntl). Three states in the charge pump correspond to its output to the loop filter: State 1: Charging current: +ICP State 2: Discharging current: -ICP State 3: Zero current