Structural Engineering and Mechanics, Vol. 48, No. 6 (2013) 000-000 DOI: http://dx.doi.org/10.12989/sem.2013.48.6.000 000 Copyright © 2013 Techno-Press, Ltd. http://www.techno-press.org/?journal=sem&subpage=8 ISSN: 1225-4568 (Print), 1598-6217 (Online) A numerical tool for thermo-mechanical analysis of multilayer stepped structures Paolo Emilio Bagnoli 1 , Maria Girardi 2 , Cristina Padovani 2 and Giuseppe Pasquinelli 2 1 Department of Information Engineering, University of Pisa, Via G. Caruso 16 56122, Pisa, Italy 2 Institute of Information Science and Technologies “A. Faedo”, National Research Council of Italy ISTI-CNR, Via G. Moruzzi 1, 56124, Pisa, Italy (Received June 6, 2012, Revised November 5, 2013, Accepted November 9, 2013) Abstract. An integrated simulation tool for multilayer stepped pyramidal structures is presented. The tool, based on a semi-analytical mathematical strategy, is able to calculate the temperature distributions and thermal stresses at the interfaces between the layers of such structures. The core of the thermal solver is the analytical simulator for power electronic devices, DJOSER, which has been supplemented with a mechanical solver based on the finite-element method. To this end, a new ele-ment is proposed whose geometry is defined by its mean surface and thickness, just as in a plate. The resulting mechanical model is fully three-dimensional, in the sense that the deformability in the direction orthogonal to the mean surface is taken into account. The dedicated finite element code developed for solving the equilibrium problem of structures made up of two or more superimposed plates subjected to thermal loads is applied to some two-layer samples made of silicon and copper. Comparisons performed with the results of standard finite element analyses using a large number of brick elements reveal the soundness of the strategy employed and the accuracy of the tool developed. Keywords: multilayer structures, thermal stresses, finite element method, power electronic devices 1. Introduction Power electronic devices are composed of structures made up of layers with different geometrical and thermo-mechanical properties. These structures are subjected to high thermal loads, which give rise to stress distributions that can damage the adhesive films between the layers and lead to debonding. The problem of the thermal analysis of such structures has been addressed in (Bagnoli et al. 2007a, Bagnoli et al. 2007b, Montesi et al. 2004), where DJOSER, a tool for computing the steady-state temperature mapping of multilayer assembly structures for power electronics, is described. The simplicity and high degree of standardization of power assemblies, which in most cases can be modeled as multilayer, stepped pyramidal structures with homogeneous layers and rectangular geometries, enable fruitful application of DJOSER, which is a time saving, user-friendly code based on an analytical approach. Corresponding author, Ph.D., E-mail: maria.girardi@isti.cnr.it