ANALYSIS OF LNS IMPLEMENTATION OF THE QRD-LSL ALGORITHMS Felix Albu 1 , Constantin Paleologu 2 , Silviu Ciochina 2 1 DSP Group, University College Dublin, Belfield 4, Dublin, Ireland, felix@ee.ucd.ie 2 Electronics & Telecommunications Faculty, Bvd. Iuliu Maniu, 1-3, Bucharest, Romania, pale@comm.pub.ro ABSTRACT In this paper we examine the implementation of two QR-decomposition-based least-squares lattice (QRD-LSL) algorithms using logarithmic arithmetic. The classical QRD-LSL uses many square root operations, which are quite complex in a DSP implementation. The proposed Modified QRD-LSL (MQRD-LSL) algorithm eliminates square root operations and achieves a computational complexity of O(M), where M is the model order. We show that the performance of the 32-bit logarithmic number system implementations match the correspondent 32- bit floating-point implementation. We also show that the 20-bit LNS implementation of the MQRD-LSL algorithm is superior to the 20-bit LNS implementation of the classical algorithm. 1. INTRODUCTION The QRD-LSL algorithms represent an alternative to LMS algorithms in many applications due to their fast convergence. The fast convergence and good numerical stability [2], [3] are general qualities of QRD-LSL algorithms. In [2] the possibility of using the classical QRD-LSL adaptive algorithm for digital echo cancellers is analyzed. It easily fulfills the requirements of the G.168 recommendation concerning the steady-state echo return loss enhancement and convergence speed [4]. Generally, one can assert that this class of algorithm is much more robust to double-talk than the NLMS type algorithms. Also, we analyze a modified version of it with lower complexity [1]. By eliminating the square root operations the computational complexity is lower, compared with the classical QRD-LSL algorithm. The modified algorithm has 3M + 1 less multiplication-divisions per iteration, where M is the filter length [1]. Also, it has no square root operations at all. Contemporary microprocessors perform real arithmetic using the floating-point system. Floating- point circuits are large, complex and much slower than fixed-point units; they require separate circuitry for the add/ subtract, multiply, divide, and square-root operations; and all floating-point operations are liable to a maximum half-bit rounding error. As an alternative to floating-point, the logarithmic number system offers the potential to perform real multiplication, division and square-root at fixed-point speed, and in the case of multiplication and division, with no rounding error at all. These advantages are, however, offset by the problem of performing logarithmic addition and subtraction. Fig. 1 IEEE standard single precision floating point representation and the 32-bit LNS format The 32-bit floating-point representation consists of a sign, 8-bit biased exponent, and 23-bit mantissa. The LNS format is similar in structure (see Fig. 1). The 'S' bit again indicates the sign of the real value represented, with the remaining bits forming a 31-bit fixed point word in which the size of the value is encoded as its base-2 logarithm in 2's complement format. Since it is not possible to represent the real value zero in the logarithmic domain, the 'spare' (most negative) code in the 2's complement fixed point part is used for this purpose, which is convenient since smaller real values are represented by more negative log-domain values. The chosen format compares favorably against its floating-point counterpart, having greater range and slightly smaller representation error [5]. A 20-bit LNS format is similar. It maintains the same range as the 32-bit, but has precision reduced to 11 fractional bits. This is comparable to the 16-bit formats used on commercial DSP devices. The 20-bit version requires just 10,920 bits of lookup tables. The 32-bit LNS implementation uses 321,536 bits of lookup tables. Table 1 presents the LNS arithmetic operations. We employ a solution developed by the HSLA project team [5], which yields a drastic reduction in the size of the look-up tables