IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 2, Issue 4 (May. Jun. 2013), PP 53-56 e-ISSN: 2319 4200, p-ISSN No. : 2319 4197 www.iosrjournals.org www.iosrjournals.org 53 | Page Design and Implementation of Feasible Direct Digital Synthesizer to Eliminate Manual Tweaking Snehal Gaikwad 1 , Kunal Dekate 2 1 (E&TC, D.M.I.E.T.R., Wardha, Nagpur University, India) 2 (Electronics, G.H.R.C.E., Nagpur, Nagpur University, India) Abstract: This paper presents design and simulation of the programming model of optimal and feasible Direct Digital Synthesizer that eliminates the need for the manual tuning and tweaking related to component aging and temperature drift in analog synthesizer solutions. A Direct Digital Synthesizer is a measure part o Digital Down Converter where the DDC (Digital Down converter) has become a cornerstone technology in communication systems. Digital Down Converter (DDC) is key component of RF systems in communications, sensing, and imaging. This paper also evaluates the performance of DDS under various programming parameters and finally performs the realization of DDS using Virtex II Pro. Keywords: Theory of DDC, Direct Digital Synthesizer (DDS), Performance of Direct Digital Synthesizer and Simulation Results. I. Introduction Digital down Converter (DDC) is key component of RF systems in communications, sensing, and imaging. Digital radio receivers often have fast ADC converters to digitize the band limited RF or IF signal generating high data rates; but in many cases, the signal of interest represents a small proportion of that bandwidth. To extract the band of interest at this high sample rate would require a prohibitively large filter. A DDC allows the frequency band of interest to be moved down the spectrum so the sample rate can be reduced, filter requirements and further processing on the signal of interest become more easily realizable. A fundamental part of many communications systems is Digital Down Conversion (DDC). A Digital down Converter is basically complex mixer, shifting the frequency band of interest to baseband. The DDC is typically used to convert an RF signal down to baseband. It does this by digitizing at a high sample rate, and then using purely digital techniques to perform the data reduction. 1.1. Overview of the DDC implementation Consider a signal lying in the range 10-20 KHz. The signal bandwidth is 10 KHz. However, it is often digitized with a sampling rate over 1 M samples per Second, representing in the region of 2Mbyte/second. The DDC allows us to select the 10-20 KHz band, and to shift its frequency down to base-band and in doing so reduce the sample rate, with a 10 KHz bandwidth, a sample rate of 100 KHz would be fine - giving a data rate of only 0.2Mbyte/second. This is shown in Fig.1. II. DDS (Direct Digital Frequency Synthesizer) The DDS (Digital Direct Synthesizer) is an implementation of a direct digital frequency synthesizer (DDS) (also called Number Controlled Oscillator, NCO) which produces a sine wave at the output with a specified frequency and phase (adjustable at run time). The resolution of the Frequency Tuning Word (FTW), the phase and the amplitude are defined separately. While the FTW resolution can be set by the generic ftw_width, phase and amplitude resolution are defined as constants phase_width and ampl_width in the separate package sine_lut_pkg. This is generated by a Matlab script (sine_lut_gen.m), the m-files are described in their headers.