IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 3, Issue 3 (Sep. – Oct. 2013), PP 61-68 e-ISSN: 2319 – 4200, p-ISSN No. : 2319 – 4197 www.iosrjournals.org www.iosrjournals.org 61 | Page Performance Analysis of the Algorithms for the Construction of Rectilinear Steiner Minimum Tree Vani V 1 , G R Prasad 2 1 (Department of Information Science and Engineering, Bangalore Institute of Technology, Bangalore, India) 2 (Department of Computer Science and Engineering, B M S College of Engineering, Bangalore, India) Abstract : The advances in VLSI technology have led to complex and larger circuits. As the circuits become complex and large, the amount of time required for the design of such circuits increases. The people in the VLSI industry are looking for faster EDA (Electronic Design Automation) tools so as to reduce the design time. Routing is a phase in the design (physical design) of electronic circuits, wherein pins of a net will be interconnected and this uses Rectilinear Steiner Minimum Trees. Rectilinear Steiner Minimum Tree problem is to find a minimum length tree connecting the given set of points using only horizontal and vertical line segments, with the additional set of points (Steiner points). Steiner points are introduced to reduce the total length of the tree and to connect in rectilinear manner. The problem of finding Rectilinear Steiner Minimum Tree is one of the fundamental problems in the field of electronic design automation. This paper provides a comprehensive analysis of the various Rectilinear Steiner Minimum Tree algorithms proposed till date and shows that there is a need for an algorithm or approach to produce better solution quality (reduced wire length) in less time. Rectilinear Steiner Minimum Tree is widely used in global routing phase of VLSI design and wire length estimation. Keywords: Global Routing, Rectilinear Steiner Minimum Tree, Rectilinear Minimum spanning Tree, VLSI design I. INTRODUCTION The main goal of routing in VLSI design is to interconnect the cells that have been assigned positions as a solution of the placement problem. Routing is generally performed in two different stages. The first stage, called the global routing will identify the wiring channels through which connections can run. The second stage, called detailed routing, fixes the exact paths that the wire has to take. Rectilinear Steiner Minimum Tree (RSMT) is used in the global routing phase of VLSI Design [1]. Given a set of points P(terminal points), Rectilinear Steiner Minimum Tree(RSMT) is the minimum length tree constructed over {P}U{S} using only horizontal and vertical line segments, where S is the set of additional points called Steiner Points (Fig. 1). The distance between two points is measured in the rectilinear metric. The rectilinear distance between a pair of points p i = (x i , y i ) and p j =(x j , y j ) is equal to |x i - x j | + | y i - y j |. Fig. 1 Rectilinear Steiner Minimum Tree Fig. 2 Hanan Grid and Minimum Spanning Tree Hanan[2] was the first to consider the rectilinear version of Steiner Tree. He gave exact solutions for n≤5 and also showed that the possible candidate Steiner points (CSp) lie on Hanan Gr id (fig 2). Garey and Johnson [3] showed that the problem of constructing RSMT is NP-Complete and Hwang [4] proved that the ratio of cost of Rectilinear Minimum Spanning Tree (RMST) to the cost of RSMT is ≤ 3/2. Fig.1 shows a RSMT for connecting pins p 1 , p 2 , p 3 , p 4 and p 5 along with the Steiner points s 1 , s 2 and s 3 .