A Morphing Approach To Address Placement Stability Philip Chong Cadence Berkeley Labs Berkeley, CA 94704 pchong@cadence.com Christian Szegedy Cadence Berkeley Labs Berkeley, CA 94704 szegedy@cadence.com ABSTRACT Traditionally, research in global placement has focused on relatively few simple metrics, such as pure wirelength or routability estimates. However, in the real world today, de- signs are driven by not-so-simple issues such as timing and crosstalk. The future holds even more difficulties as phys- ical models for devices and interconnects become increas- ingly complex and unpredictable. Adoption of an iterative methodology, where one incrementally fixes design errors, is a basic approach to tackling these problems. However, developers of placement algorithms have long neglected the need for an tool which can be easily adopted into an incre- mental design flow. We propose a novel placement approach called grid mor- phing, which is specifically tailored for an incremental ap- proach to placement. In particular, our technique focuses on the stability of the placement, which is critical for minimiza- tion of perturbation of the final placement under changes applied to the input netlist. We compare the stability of our approach to existing placement tools, and show through experiments that our approach still delivers good results un- der traditional placement metrics. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design Aids—Placement and Routing General Terms Design, Algorithms Keywords Morphing, Stability, Incremental Placement 1. INTRODUCTION The problem of placement for digital integrated circuits has always been a critical component of the design process. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. ISPD’07, March 18–21, 2007, Austin, Texas, USA. Copyright 2007 ACM 978-1-59593-613-4/07/0003 ...$5.00. Many important aspects of the final design such as area, speed, and yield, are all heavily influenced by the place- ment chosen. It is therefore not surprising that this field re- mains a fertile area for research, with various techniques and heuristics proposed over the years. Among the techniques which have appeared in the literature are partitioning-based methods [4], annealing-based methods [10], and quadratic programming or analytic methods [12, 7, 14, 13, 15, 6]. Most existing placement approaches focus on netlength as the primary objective function and try to incorporate other objectives and constraints as lower priority extensions. As design processes become more complex, a need for flexible software architectures for physical design arises. Placement becomes an environment instead of a monolithic tool, in that it requires the capability to incorporate new objectives with- out change to the core engine. This type of transparency is hard to realize in traditional placement frameworks. The main reason for this is the nonsmooth internal behavior of the underlying algorithms which make it hard to make pre- dictions on the final physical characteristics of the nets based on their preliminary status in the early stage of the place- ment process. A related issue is the problem of incremental placement: given a initial placed design and another design that arises from a number of changes (typically introduced by some other optimization, such as buffer insertion or gate resizing). The task is to find a new high quality placement which is legal and is similar to the original placement as much as possible. This requirement on the stability is crucial as the optimization steps are based on wiring estimations derived from the original placement; excessive perturbation renders such estimates useless. In this paper we present a technique to address the issue of placement stability. The novelty in our approach lies in the technique we use to resolve overlaps, which is recognized as a key difficulty in incremental placement. We have developed an extremely fast technique which we call grid morphing, which eliminates density overloads across the die in a natu- ral fashion. Our approach is to first superimpose a relatively fine grid over the die, then smoothly deform the grid, mov- ing the gates along with the grid. The deformation of the grid is chosen so that the density overloads are reduced in the resulting placement, while the relative perturbation to the original placement is minimized. It is crucial that we iteratively apply this grid morphing operation, allowing for a gradual movement of gates, so that we never make sudden, large perturbations from the starting placement so early es- timations of the electrical properties of the nets remain valid.