IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308 __________________________________________________________________________________________________ Volume: 03 Issue: 05 | May-2014, Available @ http://www.ijret.org 242 COMPARISON OF THD REDUCTION FOR ASYMMETRICAL CASCADED H-BRIDGE INVERTER S.Kalaivani 1 , K.Kavinelavu 2 , G.Jegadeeswari 3 , S.Kanimozhi 4 1 PG Student, Department of EEE, Sri Manakula Vinayagar Engineering College, Pondicherry – 605107, India 2 PG Student, Department of EEE, Sri Manakula Vinayagar Engineering College, Pondicherry – 605107, India 3 PG Student, Department of EEE, Sri Manakula Vinayagar Engineering College, Pondicherry – 605107, India 4 PG Student, Department of EEE, Sri Manakula Vinayagar Engineering College, Pondicherry – 605107, India Abstract This paper proposes the performance of single phase seven, nine and fifteen level asymmetrical H-bridge multilevel inverter. Sinusoidal pulse width modulation technique is used for pulse generation. By comparing reference and carrier signal, we can generate the SPWM for H-bridge inverter. This proposed inverter widely used in industrial applications such as speed control of induction motor, brushless dc motor etc. This switching scheme reduces the total harmonic distortion, switching losses and increases the output level.FFT analysis and output result of inverter with R-load is discussed in this paper. Keywords: Multilevel inverter, THD, cascaded H-bridge inverter, R-load, simulation results. ----------------------------------------------------------------------***-------------------------------------------------------------------- 1. INTRODUCTION Multilevel inverter is used to convert uncontrolled D.C to controlled A.C. In recent years, asymmetric multilevel inverters have received increasing attention because it is possible to synthesize voltage waveforms with reduced harmonic content, even using a few series- connected cells. In this paper seven, nine, fifteen level inverter with it results has been discussed. For pulse generation sinusoidal pulse width modulation technique is used. This technique is most widely used in industrial application. FFT is used to determine the harmonic analysis for seven, nine and fifteen level inverter. The paper can be ordered as follows: Section 2 explains the proposed cascaded H-bridge inverter. Section 3 discusses the modulation techniques. Section 4 explains the circuit model of single phase seven level, nine levels and fifteen level inverter. Section 5 discusses the simulation results. In section 6 discusses the comparison of total harmonic distortion for all three types of inverter. 2. PROPOSED CASCADED H-BRIDGE INVERTER Multilevel inverter owns a separate DC source to form a single phase full bridge or H-bridge inverter. By different combination of four switches S1, S2, S3 and S4, it can generate the three different output voltage +Vdc, 0, -Vdc. The switches S1 and S4 turned on to obtain a +Vdc, for –Vdc the switches S2 and S3 gets turn on. The output voltage is 0 when the switches S1 and S4 or S2 and S3 are turn on. Here, the final output voltage levels becomes the sum of each terminal voltage of H-bridge, and it is given as V out = V HB1 + V HB2 (1) Fig -1: General Circuit for H-Bridge Inverter