International Journal of Science and Modern Engineering (IJISME) ISSN: 2319-6386, Volume-1, Issue-5, April 2013 50 Abstract —a Space Vector Pulse Width Modulation Method (SVPWM) is an advanced intense computational modulation method with several advantages such as less harmonic content relative to other PWM modulations, effective utilization of dc bus, and complete digital implementation by a single chip microprocessor. Due to the advantages SVM has increasing applications in power converters and motor control. 2-level inverter is the first model developed using this technique. In this paper, we implement SVPWM technique for 2-level inverters in the simplest way possible and optimized memory usage by processor using programmable pulse generator. Index Terms— Programmable Pulse Generator, SIMULINK, SVPWM, Two-level inverter I. INTRODUCTION Conventionally in general Space vector Pulse Width Modulation Technique is implemented using look up tables by processor to retrieve the data and process to generate gate signals for gate switching which is tedious for the processor as it require considerably high amount of memory. And even in few situations the data saved is not at all useful to compute or process in order to generate gate signal. This burden on processor may lead to ineffective performance by the system. As such if the burden on processor is minimized the performance can be improved yielding high reliability. In this paper the processor instead of retrieving data from look up tables for processing SVPWM algorithm, a code is designed which helps processor from using excessive memory. In this paper the code that provides a unique functional block called programmable pulse generator helps processor generate waveforms of specified pulse width in specified period with specified delay without the necessity of lookup tables. II. PRINCIPLES OF SVPWM Space vector modulation (SVM) is one of the preferred real- time modulation techniques and is widely used for voltage source inverters Fig 1 Circuit Diagram for 2-Level Inverter Manuscript received on April, 2013. B.N.Kartheek, B.Tech. Asst. Professor, Electrical & Engineering, K.L. University, Guntur (A.P.), India P.S.D.M.Chandana, B.Tech. Final Year Student, Electrical & Engineering, K.L. University, Guntur (A.P.), India S.Niveditha, B.Tech. Final Year Student, Electrical & Engineering, K.L. University, Guntur (A.P.), India The operating status of the switches in the two-level inverter in Fig 1 can be represented by switching states. Table 1: Switching States of SVPWM As indicated in Table 1, switching state „1‟ denotes that the upper switch in an inverter leg is on and the inverter terminal voltage (V an , V bn , V cn ) is positive (+V d ) while „0‟ indicates that the inverter terminal voltage is zero due to the conduction of the lower switch. There are eight possible combinations of switching states in the two-level inverter as listed in Table 1. The switching state [100], for example, corresponds to the conduction of S1, S6, and S2 in the inverter legs A, B, and C, respectively. Among the eight switching states, [111] and [000] are zero states and the others are active states. Space vector concept The concept of space vectors is derived from the rotating field of AC modulating the inverter output voltage. In this modulation technique the three phase quantities can be transformed to their equivalent 2-phase quantity either in synchronously rotating frame or stationary frame. From this 2-phase component the reference vector magnitude can be found and used for modulating the inverter output. The active and zero switching states can be represented by active and zero space vectors, respectively. A typical space vector diagram for the two-level inverter is shown in Fig. 2, where the six active vectors V1toV6 form a regular hexagon with six equal sectors (I to VI). The zero vector V0 lies on the center of the hexagon. Fig 2 Space Vector Diagram For A Two Level Inverter An Optimized Code for Space Vector PWM for A Two Level Voltage Source Inverter B.N.Kartheek, P.S.D.M.Chandana, S.Niveditha