Simulation-Equation-Based Methodology for Design of CMOS Amplifiers Using Geometric Programming Abstract—Geometric Programming (GP) has been employed in automatic design of analog integrated circuits. Its major advantage is the ability to find the globally optimum solution to a problem. It however, suffers from dependency on the accuracy of the initial equations and the parameters used in these equations. This, in circuit design, causes discrepancies between GP predictions and simulation results - especially in sub-micron devices - thus resulting in a non-globally optimum circuit design. In this paper, two major sources of this discrepancy are introduced and resolved by an iterative simulation-equation- based design methodology based on GP for operational amplifiers. In order to show the effectiveness of the methodology, it has been applied to two op-amp architectures. I. INTRODUCTION As the demand for high-speed and accurate mixed-signal integrated circuits is increasing, the design of analog circuits such as operational amplifiers (op-amps) is becoming more challenging. Digital designers have developed suits of optimization tools that have helped them enhance productivity. Likewise Computer-Aided-Design (CAD) tools have been of increasing demand in the recent years in the field of analog integrated circuits. There has been extended research in the area of computer aided design of analog circuits. Three main approaches used are equation-based, simulation-based and simulation-equation-based methods. Equation-based methods like [1] simplify the circuit equations and device models into first or second order estimations and use global optimization techniques like Geometric Programming (GP) for the circuit design. Employing geometric programming has attracted considerable attention by applying its global optimization method in CMOS op-amps and other building blocks of analog circuits [1]. The major limitation of this approach is the incapability of handling non-convex problems, which can be critical in many cases and cause some errors between GP prediction and simulation results especially in deep- submicron devices. CADs that are developed based on these methods solve the optimization problem fast and usually can find the global-optimized solution of the equations but simplified equations can not show the higher order effects which can be rather important for deep-submicron CMOS processes. Thus the achieved optimal solution can deviate substantially from the real optimum circuit. Simulation-based methods [2] use more complicated circuit models to improve accuracy. They use classical optimization methods like steepest descent and Lagrange multiplier methods. These methods can handle a wide variety of problems which is their main advantage. The main disadvantage of these methods is that most of them find locally optimal designs. Simulation-equation-based methods, utilized recently in GBOPCAD (Gain Boosting Opamp CAD) [3] and ISECAD (an Iterative Simulation-Equation-Based CAD) [4], gain the benefits of equation-based approaches and that of the simulation-based methods, while avoiding their shortcomings by combining the characteristics of both methods. These methods, also, provide only the locally optimal designs. In this paper, an innovative method based on an iterative simulation-equation-based approach between circuit simulation and GP core will be presented. First, the solutions to the initial equations (circuit sizes) are obtained based on a metric-optimized methodology according to the desired application such as power optimization. The mentioned initial equations are implemented based on initial assumptions of transistor variables such as carrier mobilities. Next, using these transistor sizes, SPICE simulation is performed and the results are evaluated. According to the simulation results, the initial parameters and equations are corrected and the new circuit parameters are extracted from the corrected equations and this process will continue to reach the required circuit specifications with desired error between GP core prediction and simulation results. We choose MOSEK [5], an optimization tool which is run in MATLAB, as the GP analytical tool and Hspice for the evaluation tool. We developed a code for the interface between them for the purpose of solving the equations, evaluating the circuit and repeating this process automatically. The organization of the rest of this paper is as follows. In section II geometric programming will be described briefly. Previous reports in the field of analog integrated circuits will be reviewed in section III. Section IV describes the transistor model which is used in this paper, furthermore optimization of a telescopic cascode op-amp will be presented. Also in this section, major sources of discrepancies and the use of an iterative method to solve the problems they cause is pointed out. In section V a design example for a widely-used architecture (two-stage amplifier) is explained. Finally, concluding remarks are presented in the last section. II. GEOMETRIC PROGRAMMING Geometric programming is a type of mathematical optimization problem characterized by objective and Reza Lotfi Dept. of Electrical Engineering, Ferdowsi University of Mashhad Mashhad, Iran rlotfi@ieee.org Farzad Inanlou Dept. of Electrical and Computer Engineering, Boston University Boston, USA farzad@ieee.org Mohammad Hossein Maghami Dept. of Electrical Engineering, Amirkabir University Tehran, Iran mhmaghami@ieee.org 978-1-4244-2182-4/08/$25.00 ©2008 IEEE. 360