1. Introduction Digital devices are developed by different blocks of digital logic circuits and the combination of which performs the desire task. The eficient implementation of logic functions using minimum number of logic gates is necessary to minimize production costs, and maximize a device’s performance[1]. All digital systems have two major functional blocks, memory elements for storing data, and combinational circuits for transform that information. The three major functions of any memory elements are to store data i.e. hold data, accept writing a new data and read the stored data. Minimization of digital logic circuits are one of the important and well-known problems in circuit design and testing. Different methodologies are used for completely speciied Boolean function and incompletely speciied Boolean function. There are two main approaches to synthesis in logic design based on formal exact algorithms and based on informal methods i.e. heuristic algorithms. The exact algorithms are often unsuitable for the minimization of Boolean functions and optimization of logic networks particularly with more number of input variables. Heuristic algorithm gives acceptable solutions and sometimes even optimal ones in a short time for large size problems, but there is no guarantee that they will do so in any particular case most of them provide quasi-optimal solutions. Heuristic minimization of Boolean functions are motivated by the need to reduce the size of two levels. Two-level logic minimization *Corresponding author. © Elsevier Publications 2014. Constraints Analysis for Minimization of Multiple Inputs Logic Programming Sahadev Roy*, and Chandan Tilak Bhunia Department of ECE NIT, Arunachal Pradesh, Yupia, Itanagar, India Email: sdr.ece@nitap.in ABSTRACT: Minimization of logic functions by computer programs are considered traditionally to be dificult and tedious as the incorporation of full logic negation tends to super-exponential time complexity. The paper presents constrains for minimization of logic circuits. Using these analysis minimized sum of products terms may be generating from any given sum of product terms of multiple input variables. For a new algorithm for minimization using computer programming must be overcome these problem presented. We also discuss the scope heuristic minimization technique over the exact minimization technique. Keywords: Algorithm, Minterms, Minimization, Logic, Boolean function, SOP, POS Weighted sum, Complexity, Constraint. consists of inding a minimum SOP that covers a given Boolean function design based on SOP and POS expression [2]. Logic networks that have more two levels often have fewer gates and meet lower fan-in and fan-out limits [3]. The design of multi level networks is more complex that of two level ones [4]. No practical and exact minimization techniques are known for general multi level networks[5]. Many heuristic techniques are present for multi level logic networks optimization[6]. 2. Complexity of Minimization Many heurestic approach minimize the logic circuite quickly. Using minimization algorithm for multiple input into the two input variables eassily minimized into two variable [2]. Two main approaches can be used by general tools and specialized programs. General tools support the declarative statement of problems but are too ineficient. Specialized programs require much programming effort and are hard to maintain. No general and eficient algorithms are exist to solve minimization problems, which can be viewed as search problems with mutiple input. PROLOG provides a powerful language for a logical formulation of combinational problems. Its relational form and the logical variables are entirely adequate to solve the problems in a declarative way, and its nondeterministic computation liberates the user from tree-search programming. However, International Conference on Signal and Speech Processing (ICSSP-14) (61–64)