International Journal of Scientific and Research Publications, Volume 4, Issue 4, April 2014 1 ISSN 2250-3153 www.ijsrp.org Design of Topologies of Current Controlled Current Conveyor in 16 nm Bulk CMOS Technology Mohd.Faseehuddin 1 , Sadia Shireen 2 1, 2 M.Tech Student, EC department, Integral University, Lucknow, Uttar Pradesh, India Abstract- Advancement in VLSI technology has led to larger number of components on a single chip making it a reality to realise portable systems. Analog circuits are important in every VLSI systems such as filters, current and voltage amplifiers, comparators, A/D and D/A converters, etc. Miniaturization in circuit design requires low- power low-voltage (LPLV) analog integrated circuits to be designed. Analog signal processing’s inherent advantage of low power and high speed has led to extensive research in analog domain. Current domain processing having advantages of higher bandwidth, large dynamic range, greater linearity, simple circuitry seems to be the solution. Among the number of current mode topologies current conveyor is the most versatile building block. The second generation Current controlled current conveyor (CCCII) has attained greater popularity in recent years due to electronic adjustability of its X-terminal intrinsic resistance through bias current. Here we have designed three topologies of CCCII found in literature namely dual output current controlled current conveyor (DOCCCII), current controlled current conveyor transconductance amplifier (CCCCTA) and digitally programmable current controlled current conveyor (DPCCCII) in 16nm bulk CMOS technology using PTM (High Performance 16nm Metal Gate / High-K / Strained-Si parameter). Index Terms- Current Conveyor, DOCCCII, CCCCTA, DPCCCII I. INTRODUCTION With scaling down of CMOS to comply with large scale integration and system on chip requirements together with increased demand for portable and battery operated devices, low power low voltage (LP LV) devices are need of the hour. The current mode devices are more suited for (LP LV) operation than their voltage counterpart [1, 2]. Current mode circuits are more immune to noise, less sensitive to supply voltage and have low electrostatic discharge, low propagation delay, high slew rate etc. [2,4]. Among various current mode devices current conveyor (CC) is the most functional device by virtue of its versatile features such as simplicity in design, higher gain bandwidth product, linearity, high frequency operation, less chip area, low power dissipation [4-7] etc. In 1968 [1] the current conveyor (CC) was introduced and has since found recognition in both conceptual and practical implementation. Researches published in last few years reveals that analog circuit designers are now considering the CC as a building block for designing multitude of applications like signal processing, amplification, instrumentation etc. [1,8,9]. A CC is a three terminal device having a low impedance input, a high impedance input simultaneously with a characteristic of virtual short and a high impedance output terminal [1,3]. Since its introduction many topologies of CC have been developed, but second generation current controlled current conveyor (CCCII) gathers larger attention from designers due to its high tunability [1,2,10]. CCCII has in built parasitic resistance which is self-adjustable by bias current, due to this parasitic resistance the requirement of external resistance is reduced. Practical CC has various non- idealities and some of them prove their importance in different applications [11, 12]. Parasitic resistance of CCCII is one of its useful non idealities. Literature shows there are many tunable circuits i.e. current differencing transconductance amplifier (CDTA) [13], current follower transconductance amplifier (CFTA) [14,15], current controlled current conveyor transconductance amplifier (CCCCTA) [16-18], digitally programmable current conveyor (DPCCII) [19,20] etc. In this work we will be designing CCCCTA, DPCCCII and DOCCCII among various topologies of CCCII in 16 nm bulk CMOS and discuss their features. II. CCCII AND ITS TOPOLOGIES After its introduction in 1995 [10] CCCII has been the first choice of analog designers mainly because it includes a X- node parasitic resistance which can be electronically controlled through the input bias current and so needs no additional resistance for activation. Current negation and current duplication is very easy to obtain in case of a CCCII, leading to DOCCCII. The equivalent circuit symbol and the principal equation of DOCCCII are given in FIG.1 and Eq.1. DOCCCII has two high impedance current output nodes which provide quadrature signals. FIG. 1. BLOCK DIAGRAM OF DOCCCII [     ]=[          ][    ] (1)   =      IY IB DOCCCII X Y Z+ Z- IX IZ+ IZ-