Abstract—This paper reports estimation of error in nonlinearity in ADC using histogram test. Also variance estimation in nonlinearity is done. Error determination in Differential Nonlinearity (DNL) and Integral Nonlinearity (INL) of an ADC is done by taking deviation of estimate value from actual value. Variance in estimated INL and DNL is determined to check the usefulness of basic histogram test algorithm. Arbitrary error is introduced in ideal simulated ADC transfer characteristics and full scale simulated sine wave is applied to ADC for estimation of transition errors and nonlinearity errors. Simulation results for 5 bit ADC are presented which show effectiveness of the proposed method. Index Terms— Nonlinearity, Transfer Characteristics, Code bin width, Error estimation, Transition levels. I. INTRODUCTION Digital systems outperform analog systems in many applications. Most of the time signals are available in analog domain and need arises to convert them in digital using ADC. Various applications of ADC are data acquisition systems, measurement systems, and digital communication systems. Such a wide spread usage confers great importance to the testing activities, which now a days largely contributed to the production costs of integrated circuit devices. In this regards, it should be observed that the ADC test duration and costs tend to grow significantly for high resolution ADCs [1]. Hence, choosing an efficient test and improving the associated performance may significantly reduce the industrial cost of an ADC manufacturing process. ADC is usually characterized by its figures of merit like Effective Number of Bits (ENOB), Signal to Noise and Distortion ratio (SINAD), DNL and INL [2]. The histogram test is extensively used in the area of ADC testing to obtain its transfer function and consequently several parameters of Manuscript received May 10, 2008. R. S. Gamad is Reader in Electronics and Instrumentation Engineering Department, Shri G. S. Institute of Technology and Science Indore, India (Phone: +91-9827507103; fax: +91-731- 2432540; e-mail: rsgamad@gmail.com). D. K. Mishra is Professor and Head in Electronics and Instrumentation Engineering Department, Shri G. S. Institute of Technology and Science Indore, India (phone: +91- 9826049643; fax: +91-731- 2432540; e-mail: mishrad_k@hotmail.com). interest namely, INL, DNL, ENOB, gain error and offset error, among others. All these parameters attest the capacity of the ADC to perform its intended function. ADCs are rarely used alone, but are often included in more elaborate systems. The performance of the ADCs will affect the performance of the system where it is included and the precision with which the ADC parameters are known is necessary to compute the precision of the final result of the system using it [3]. Standard histogram technique is popular method which estimates DNL and INL related to each transition voltages of an ADC [4]. Earlier work on ADC testing using histogram technique has been reported for determination of DNL, INL, gain error, offset error and ENOB [5]–[10]. Recently work on estimation of errors in code transition levels and computation of variance in gain and offset has been published [3] [4] and performance of ADC parameters has been evaluated [12]. In this paper our contribution is in estimation of error in DNL and INL in addition to variance determination in both type of non-linearity. Section II presents brief review of earlier work using histogram technique. Mathematical formulae for estimation of error in nonlinearity and variance in DNL and INL are presented in section III. Simulation results and discussion are reported in section IV. Conclusions are presented in section V. II. EARLIER WORK BASED ON HISTOGRAM TECHNIQUE A sinusoidal stimulus signal with frequency (f), amplitude (A), and offset (O) is applied to the ADC under test and predefined number of samples, M, with sampling frequency (fs) are acquired. The expression used to estimate the transition levels, T[k], of an ADC with N bits is given as [3] [7]. ˆ [ 1] . k C Tk O A cos M π ⎛ ⎞ + = − ⎜ ⎟ ⎝ ⎠ , K=1, 2… 2 N-1 (1) Where 1 0 [] k k i C hi − = = ∑ [] hi = The total number of samples received in code bin I The number of counts in the cumulative histogram is a random variable and it depends on real transition voltages ‘T’ and number of samples ‘M’. The normalized transition voltages ‘U’ can be expressed as: Estimation of Error in Nonlinearity in ADC using Standard Histogram Technique R. S. Gamad and D. K. Mishra Proceedings of the World Congress on Engineering and Computer Science 2008 WCECS 2008, October 22 - 24, 2008, San Francisco, USA ISBN: 978-988-98671-0-2 WCECS 2008