International Journal of Engineering Research and Development e-ISSN: 2278-067X, p-ISSN: 2278-800X, www.ijerd.com Volume 11, Issue 07 (July 2015), PP.01-07 1 Single Hard Fault Detection in Linear Analog Circuits Based On Simulation before Testing Approach G.Puvaneswari 1 , S.UmaMaheswari 2 1 Department of Electronics and Communication Engineering, Coimbatore Institute of Technology, Coimbatore-641014,India. 2 Department of Electronics and Communication Engineering, Coimbatore Institute of Technology, Coimbatore-641014,India. Abstract:- A method for single hard fault detection in linear analog circuits based on simulation before testing approach is proposed in this paper. Simulation before testing approach locates or identifies faulty components of the circuit under test (CUT) by creating a fault dictionary for all the potentially faulty components from the simulation of CUT. In the proposed approach, the CUT is simulated using Modified Nodal Analysis (MNA) to find the values of circuit parameters or diagnosis variables. Test vectors corresponding to the components of CUT are generated from the circuit matrix which act as key feature in identifying the potentially faulty components and are treated as fault dictionary. Test vectors are used to determine the diagnosis variables for testing. The tolerance problems of analog circuit testing as well as the sensitivity of the test vectors to component values affect the practical possibility of the approach. To solve this, test vectors are generated for upper and lower bound values of the components of CUT and testing is performed. A CUT is said to be fault free if the circuit variables are within the fault free range. Fault variables corresponding to the components of CUT are derived and the fault variable which has lowest relative standard deviation is found and the corresponding component is declared as faulty. The proposed approach is tested on bench mark circuits and validated through the results obtained from simulation. Keywords:- linear analog circuits – modified nodal analysis- test vector – fault diagnosis- hard faults I. INTRODUCTION Analog circuit testing is an important research problem due to non availability of standardized methods or procedures. The factors like tolerance and nonlinearity of circuit components limit development of standard methods for single or multiple faults in analog circuits. Analog circuit faults are modeled as parametric or soft faults and catastrophic or hard faults. Parametric or soft faults are hard to detect as they cause degradation in system performance where as hard faults cause topological changes and complete system performance variation. Fault detection methods are classified as simulation before testing (SBT) and simulation after testing. Simulation before testing approach is based on the development of fault dictionary which consists of the details regarding the variation in diagnosis variables for different faulty conditions of the components of CUT which requires larger data base. Simulation after testing approach performs simulation on the obtained diagnosis variables measurements to identify the faulty components which requires high computational cost. Most of the research proposals are for parametric faults detection as they are difficult to find. But it becomes necessary to locate hard faults to isolate as well correct them. In [1], circle equation-based modeling method suitable for locating parametric and hard faults is being proposed. The equation is independent from the value of element to be modeled, and uniquely determined by its location and the nominal values of the remaining elements in the circuit under test. Hence, the circle equation can model any continuous parameter shifting or hard fault occurs. Three points are sufficient to determine a circle; therefore, only three simulations corresponding to three distinct faulty parameters are used to model all parameter shifting faults. In [2], a wavelet based method is proposed to locate parametric and hard faults in analog circuits. In wavelet analysis of diagnosis variables, two test metrics, one based on a discrimination factor using normalized Euclidean distances and the other utilizing Mahalanobis distances, are introduced and they rely on wavelet energy computation. Tolerance limit, the factor that affects fault detectability, for CUT is set by statistical processing data obtained from a set of fault-free circuits. A fault dictionary based method based on weighted Mahalanobis distance based on the entropy theory is proposed in [3] and this method can reduce the fuzzy groups of analog circuits to some extent, and it is suitable for not only soft fault diagnosis, but also hard fault detection. A new fault modeling method applicable for both hard and soft faults is proposed in [4]. This approach models faults based on a function which is independent of the values of components of CUT and to resolve the tolerance effect minimum distance approach is used. A complex field modeling approach which is applicable for both hard and soft faults is proposed in [5] and is based on frequency selection method. Test vector based approach is used in [6] to locate single parametric faults. The proposed