VALVE: Variable Length Value Encoder for Off-Chip Data Buses. Dinesh C. Suresh, Banit Agrawal * , Walid A. Najjar and Jun Yang Department of Computer Science and Engineering, University of California, Riverside * Department of Computer Science and Engineering, University of California, Santa Barbara dinesh@cs.ucr.edu , banit@cs.ucsb.edu , {najjar, junyang}@cs.ucr.edu Abstract We propose VAriable Length Value Encoding (VALVE) technique to reduce the power consumption in the off-chip data buses. While past research has focused on encoding fixed length data values to reduce the transition activity in the data buses, our proposed scheme is capable of detecting and encoding variable length bit patterns in the data values. VALVE also does not require prior knowledge of input data and uses just one external control signal We evaluate our proposed scheme using a large spectrum of benchmarks and we achieve an energy reduction of 58% on an average and up to 75% on some benchmarks. We also analyze the performance penalty incurred due to the codec delay, which is found to be 0.45% of the total program execution time. We find that VALVE requires a minimal area of 0.0486 mm 2 , which can be easily implemented with in a memory controller. 1. Introduction Power consumption in the bus drivers is in direct proportion to the product of the number of signal transitions, at each cycle, and the line capacitance. Bus encoding schemes are techniques that reduce the bus power consumption by reducing the number of transitions on the bus. The overhead associated with encoding bus values is found to be negligible compared to the energy saved during off-chip transmission [8] . Frequent Value Encoding (FVE)[9] is a data bus encoding scheme that employs a k-bit, k-entry table to store previously seen data values, where k is the width of the data bus (32 in this case). During the first occurrence of a data value, the codec stores the data value in its table and sends the value unencoded. For subsequent occurrences of the data value, the codec sends a one-hot code instead of sending the entire data value. One-hot code denotes a value whose binary representation has a high value in only one of the bit positions. A full match in a data bus encoding scheme is when all the k-bits of an incoming data value matches with the corresponding bits of the stored data value. In a partial match event only a small number of the k bits do not match. Our analysis has shown that the occurrence of partial match events is three times more frequent than that of full match events. We propose VAriable Length Value Encoding (VALVE), a scheme capable of encoding both full matches and variable length partial matches in data streams. VALVE provides up to 75% reduction in energy for some applications and 58% energy savings on an average over unencoded data. 2. VALVE Design VALVE uses Content Addressable Memories (CAMs) to store a finite set of table entries at the encoder and decoder ends. Each CAM table-entry consists of a variable-width bit pattern and a fixed width code. A VALVE table segment consists of a group of table-entries that store patterns of the same width. VALVE uniquely maps each bit incoming pattern to one of the available codes stored in the table. The bit-patterns are inserted into CAMs during the first occurrence of the databus value. For subsequent occurrences of the same value (or its portion), VALVE sends the corresponding unique code instead of sending the data. VALVE asserts an external control signal whenever encoded values are sent on the bus wires. The fixed width code is always sent on a predetermined set of bus wires. In order to ensure integrity of the encoding/decoding operation, the width of the encoded portion should be greater than or equal to that of the code width. This ensures that the remaining bus wires are adequate to send the unencoded portion of the data. In Figure 1, we show the block diagram of VALVE encoder that can encode bit patterns of width 32-bits, 24-bits and 16-bits. For every data value masks are applied to extract the 32, 24 and 16 bit patterns. These bit patterns are then looked up in the appropriate segments of the VALVE table. In the event of a hit in multiple segments, the segment selector picks the hit code from a segment with the largest segment-mask (code[hit_index] in Figure 2). The k-bit code from the hit location constitutes the upper k-bits of the current data bus value. The complement of the hit segment’s mask is logically ANDed with the data value in order to get the low order bits of the encoded data bus value. The code is ORed with the low order data bits and the final 32-bit value is sent on the data bus..