Quantum transport in molecular nanowires transistors Siegmar Roth a, * , Marko Burghard a , Vojislav Krstic a , Kun Liu b , Joerg Muster a , G unther Philipp a , Gyu Tae Kim c , Jin Gyu Park c , Yung Woo Park c a Max-Planck-Institut f ur Festk orperforschung, 70569 Stuttgart, Germany b IBM Thomas J. Watson Research Center, Yorktown Heights, NY 10598, USA c School of Physics and Condensed Matter Research Institute, Seoul National University, South Korea Received 28 August 2000; accepted 8 September 2000 Abstract Nanotube-based ®eld eect transistors can be prepared by laying carbon nanotubes over electrolithographically deposited gold electrodes on silicon chips. These devices can be used to study the physical properties of the nanotubes and to investigate the electrical behaviour of the contacts between the electrodes and the tubes. From the experience with these devices technologies of chemical self-assembly can be developed which will allow for integration densities higher than achievable by purely lithographic means. Ó 2001 Elsevier Science B.V. All rights reserved. PACS: 73.22.-f; 73.63.Fg; 85.35.Kt Keywords: Carbon nanotube; Field-eect transistor; Quantum transport; Molecular electronics; Self-assembly 1. Introduction Carbon nanotubes are very thin and fairly long tubes of graphitic carbon [1]. There are single-walled and multi-walled tubes, and in each category there are me- tallic and semiconducting tubes. As long and thin me- tallic or semiconducting objects, individual nanotubes are expected to behave as quantum wires [2], and be- cause of their small volume they can also act as quantum dots and show single electron eects [3]. Carbon na- notubes are often discussed as components of future molecular electronic devices [4] and at least it is believed that studying carbon nanotubes will pave the road to molecular electronics. 2. Transistors based on carbon nanotubes Several groups have prepared transistors based on carbon nanotubes [5]. A schematic view is shown in Fig. 1 [6]: a silicon chip is used as mechanical support. A fairly thick oxid layer (1 lm) serves as electric insulation. By electron beam lithography several gold leads are deposited on the oxide. The leads are about 100 nm wide and the separation between the leads is also about 100 nm. Nanotubes are placed across the leads by controlled adsorption from an aqueous suspension [7]. Fig. 2 shows the AFM image of a single-walled nanotube lying over gold electrodes, as a top view on the left-hand panel, and as a quasi-three-dimensional image on the right-hand side. We see that the tube follows closely the substrate and bands over the gold electrodes, which is a typical behaviour of single-walled tubes. Most devices used in real experiments are less perfect. Fig. 3 presents an AFM image of a transistor which was studied in greater detail. In this case there are several tubes over the leads and the spare tubes have to be re- moved by applying voltage pulses. Finally there was only the tube left which is marked by the arrow. For this tube to work as a transistor the two leads it touches act as source and drain electrodes and a gold ®lm evapo- rated to the back of the silicon chip serves as a gate. 3. Output characteristics Fig. 4 shows the output characteristics of this tran- sistor, i.e., the current passing through the tube as a function of the voltage between source and drain (bias). The dierent curves are for dierent gate voltages. By Current Applied Physics 1 (2001) 56±60 www.elsevier.com/locate/cap * Corresponding author. Tel.: +49-711-6891343; fax: +49-711-689- 1010. E-mail address: roth@klizix.mpi-stuttgart.mpg.de (S. Roth). 1567-1739/01/$ - see front matter Ó 2001 Elsevier Science B.V. All rights reserved. PII: S 1 5 6 7 - 1 7 3 9 ( 0 0 ) 0 0 0 1 1 - 0