Field effect and Coulomb blockade in silicon on insulator nanostructures fabricated by atomic force microscope I. Ionica a, * , L. Monte `s a , S. Ferraton a , J. Zimmermann a , L. Saminadayar b , V. Bouchiat b a Institut de Microe ´ lectronique, Electromagne ´ tisme et Photonique (IMEP), UMR CNRS-INPG-UJF 5130, 23 Rue des Martyrs, BP257, 38016 Grenoble Cedex 1, France b Centre de Recherches sur les Tre ` s Basses Tempe ´ratures (CRTBT), UPR CNRS 5001, 25 Rue des Martyrs, BP166, 38042 Grenoble, France Available online 12 September 2005 The review of this paper was arranged by Prof. F. Gamiz Abstract The comprehensive understanding of the electrical behaviour of silicon nanostructures becomes more and more import evolution of the microelectronics towards nanoelectronics. In this context, we present a complete bench test for the study nanostructures, from the fabrication by a non-conventional technique, to the electrical characterisation at room and low te ture. Nanostructures with lateral gates are fabricated with an atomic force microscope (AFM) on silicon on insulator (SOI) s strates. At room temperature, we demonstrate a field effect transistor-like behaviour due to the backgate and also to the later gate. At low temperature, the electrical transport is a superimposition of the field effect and single-electron phenomena (C blockade). We demonstrate the one-dimensional character of the electrical transport at low temperature using a theoretic for arrays of dots. 2005 Elsevier Ltd. All rights reserved. Keywords: AFM lithography; SOI; Silicon nanostructures; Field effect; Coulomb blockade; One-dimensional electrical transport 1. Introduction The trend in microelectronics is to reduce the dimen- sion of the devices. In this context, nowadays, there is a real crossing from microelectronics to nanoelectronics and two types of problems are brought up: difficulties of fabricating thestructuresand understanding the new transportphenomena that may appearin very low-scale devices. From the fabrication pointof view, the limits of optical lithography techniques are more and more obvi- ous, in terms of resolution, flexibility, cost etc., so, new approachesare needed.Atomic Force Microscopy (AFM) based lithography is one of the most promising alternative techniques that emerges. Typically,AFM is used to image the surface of a sample,by scanning a tip onto the surface. The tip may induce changes in the surface in very precise conditions (for example by applying a potential between the tip and the scanned surface), so AFM can become a high resolution litho- graphy tool. The first description of nanostructures fabrication by AFM lithography on SOI substrates was described by Campbell et al. [1]. The refinements of this method, such as the oxidation in tapping mode [2] or the use ofa pulsed tension on the tip [3], have improvedthe lateral resolution of the structuresdesigned.Later 0038-1101/$ - see front matter 2005 Elsevier Ltd. All rights reserved. doi:10.1016/j.sse.2005.07.012 * Corresponding author. Tel.: +33 0 476 856 046; fax: +33 0 476 856 070. E-mail address: ionica@enserg.fr (I. Ionica). www.elsevier.com/locate/sse Solid-State Electronics 49 (2005) 1497–1503