System Prototyping dedicated to Neural Network Real-Time Image Processing Rolf F. Molz 1 , Paulo M. Engel 1 , Fernando G. Moraes 2 , Lionel Torres 3 , Michel Robert 3 1 UFRGS – Instituto de Informática Av. Bento Gonçalves, 9500 – Bloco IV Caixa Postal 15064 91501-971 - Porto Alegre – Brazil {rolf,engel}@inf.ufrgs.br 2 PUCRS – Faculdade de Informática Av. Ipiranga, 6681 - Prédio 30 90619-900 - Porto Alegre - Brazil moraes@inf.pucrs.br 3 LIRMM –Université Montpellier II 161, rue Ada 34392 Montpellier - Cedex 5 - France {torres,robert}@lirmm.fr Abstract Pattern localization and classification are CPU time intensive being normally implemented in software, however with lower performance than custom implementations. Custom implementation in hardware (ASIC) allows real-time processing, having higher cost and time-to-market than software implementation. We present an alternative that represents a good trade-off between performance and cost. This paper presents initially the state-of-the-art in this field, analyzing the performance and implementation of each work. After we propose a system for localization and classification of shapes using reconfigurable devices (FPGA) and a signal processor (DSP) available in a flexible codesign platform. The system will be described using C and VHDL languages, for the software and hardware parts respectively, and has been implemented in an APTIX prototyping platform. 1. INTRODUCTION Vision has long fascinated researchers from a broad range of disciplines, such as psychology, neural science, computer science, and engineering. Vision has been defined as a process of recognition of objects of interest, and it deals with image understanding. Artificial Neural Networks (ANN) have been used to model the human vision system. They are biological inspired, containing a large number of simple processing elements, with an execution model analogous to biological neurons. The natural neurons provide a computing architecture that is radically different from computers that are widely used today: they are massively parallel systems. This paper proposes an image processing prototyping system based on an APTIX platform [1], aiming the integration of a Digital Signal Processor (DSP) with programmable devices (FPGA). The system comprises preprocessing, feature extraction and classification tasks. These tasks will be employed to find and classify shapes for an input image. These shapes can be traffic signals, landmarks for robotics, car license, and so on. The DSP processor is used when sequential processing is required or floating point arithmetic is needed. The programmable device is used for parallel and bit level operations. This partition improve the performance of the system when compared to pure DSP implementations, reduce the time to market and cost when compared to ASIC implementation. So, this hardware/software system represents a good trade-off between performance and cost. This system is being implemented in a codesign platform (APTIX [1] board). This board has two FPGA modules (10k100 - Altera), one DSP core module (D950 - ST Microelectronics), and two memories modules (256Kbytes – 4 bits each one). This paper is organized as follows. Section 2 presents the background in object localization and classification, describing the implementation (software, mixed, ASIC or FPGA) and performance of each system. Next, in Section 3, we describe the system structure, detailing the tasks that must be accomplished. Section 4 presents preliminary results of the hardware implementation. Finally we present our conclusion and future work. 2. BACKGROUND In this section, we describe some systems dealing with object localization and classification. The relevant works published in the literature are presented in [2]. In [11] the objects must be in pre-defined positions and is completely implemented in software. A hardware implementation using the PAPRICA ASIC connected to a host is also presented in [11]. The reported results do not allow real time processing (2.5 frames/sec). The work [10] assumes a fixed distance between the vehicle and the image sensor. This restriction allows the use a proportional rule in order to accelerate the detection of desired patterns in the vehicle license. This system has a mixed implementation, with the software part running in a PC, and the hardware part running in a FPGA. The system can be used in real-time applications (30 frames/sec). The work [9] uses ANN for classification, however the system is implemented in software, resulting in a poor performance (10 sec for localization and classification). Finally, a similar work is presented in [3], aiming object localization and classification, however it was implemented in software (10-15 frames/sec). These works do not include object occlusion. Our objective is to develop a portable system for image processing, having light weight and low power