Compact Current and Current Noise Models for Single-Electron Tunneling Transistors HU Chaohong 1, 2 , Sorin Dan COTOFANA 1 , and JIANG Jianfei 2 1. Computer Engineering Laboratory, Delft University of Technology, Delft, The Netherlands 2. Research Institute of Micro/Nano Science and Technology, Shanghai Jiao Tong University, China Abstract — This paper presents an analytic current model for capacitively coupled Single-Electron Tunneling Transistors (SETTs) that is based on a modified M-state steady-state master equation. Based on this current model we also derive a current noise model for SETT. To validate the proposed models we calculate their characteristics at different device parameters and different operation temperatures and compare them with the corresponding characteristics calculated by the full master equation method. The results indicate that the proposed models with M = 3 fit well with the full master equation method at arbitrary device parameters when T <0.1e 2 /k B C and V DS <10e/C. Due to their simplicity and accuracy in a wide range of working conditions (arbitrary device parameters, T <0.1e 2 /k B C and V DS <10e/C) the proposed current and noise models can be utilized in large-scale circuit simulation. Index Terms — Single-electron tunneling, devices, noise, modeling, simulation. I. INTRODUCTION The Single-Electron Tunneling Transistor (SETT), first proposed by Likaharev’s group [1], is a popular SET device for its small size, low power consumption, and rich functionality [2]. To utilize its inherent features such as Coulomb blockade and Coulomb oscillation in large-scale circuits, an efficient, accurate and analytic model for SETT is highly required. In the early days, some numerical simulators [3-5] and a macro-model [6] have been proposed, but they are either incompatible with conventional circuit simulation or too simple to capture the device inherent behavior. In recent years, some compact analytic models have been also proposed [7-10], however, they are only available in a narrow range of temperature, restricted device parameters, or low drain- source voltage. In this paper, we propose an analytic current model for SETT that is based on a modified M- state steady-state master equation. The calculated results demonstrate that the proposed models with M = 3 fit well with the full master equation method at arbitrary device parameters and have a quite wide range of temperature (T <0.1e 2 /k B C) and drain-source voltage (V DS <10e/C). Based on the proposed current model, we also derive a current noise model for SETT. The simulations indicate that the current noise model holds the same high accuracy in a wide range of working conditions, which also provides an additional evidence for the validity of the derivation of the proposed compact current model. II. CURRENT MODEL FOR SETT BASED ON MODIFIED M- STATE MASTER EQUATION Fig. 1. SETT Schematic The SETT structure, graphically depicted in Fig. 1, is reminiscent of a usual metallic-oxide-semiconductor field- effect-transistor (MOSFET), but with a small conducting island embedded between two tunnel junctions [2], instead of the traditional inversion channel. For the SETT proper operation, both R D and R S have to be much larger than R Q , where R Q =h/e 2 ≈ 25.8 k Ω is the quantum unit of resistance. Furthermore, we assume that the charge energy is dominant to the thermal fluctuation, that is e 2 /2C >>k B T, where B G S D C C C C C + + + = is the total capacitance between the island and environment. According to the single-electron orthodox theory, we can easily get the steady master equation for SETT as [11]: 0 = ⋅ ρ Γ (1)