Capacity Allocation with Machine Duplication in Semiconductor Manufacturing* Bu ¨lent C ¸ atay, 1 S ¸. Selc ¸uk Erengu ¨c ¸, 2 Asoo J. Vakharia 2 1 Faculty of Engineering and Natural Sciences, Sabanci University, Tuzla, 34956 Istanbul, Turkey 2 Department of Decision and Information Sciences, Warrington College of Business, University of Florida, 351 Stuzin Hall, Gainesville, Florida 32611-7169 Received 23 February 2000; revised 20 October 2003; accepted 13 June 2005 DOI 10.1002/nav.20104 Published online 17 August 2005 in Wiley InterScience (www.interscience.wiley.com). Abstract: The manufacturing process for a computer chip is complex in that it involves a large number of distinct operations requiring a substantial lead-time for completion. Our observations of such a manufacturing process at a large plant in the United States led us to identify several tactical and operational problems that were being addressed by the production planners on a recurring basis. This paper focuses on one such problem. At a tactical level, given a demand forecast of wafers to be manufactured, one specific problem deals with specifying which machine or machine groups will process different batches of wafers. We address this problem by recognizing the capacity limitations of the individual machines as well as the requirement for reducing operating and investment costs related to the machines. A mathematical model, which is a variation of the well-known capacitated facility location problem, is proposed to solve this problem. Given the intractability of the model, we first develop problem specific lower bounding procedures based on Lagrangean relaxation. We also propose a heuristic method to obtain “good” solutions with reasonable computational effort. Computational tests, using hypothetical and industry-based data, indicate that our heuristic approach provides optimal/near optimal solutions fairly quickly. © 2005 Wiley Periodicals, Inc. Naval Research Logistics 52: 659 – 667, 2005. 1. INTRODUCTION Manufacturing a computer chip is a complex process involving hundreds of steps and requiring from a few days to up to 3 months of processing time to complete. The manufacturing process consists of various operation types such as oxidation, deposition, lithography, diffusion, etch- ing, ion implantation, etc. Some of these operation types are repeated several times to build different layers on the wafer. Each wafer type follows a particular sequence throughout its fabrication process visiting different work centers. Spe- cifically, each wafer makes multiple visits to the same work center at different points in the fabrication process. The common practice in the layout of work centers for different types of processes is to group similar operation types to- gether: Furnaces are grouped in one area, ion implanters in another, and so forth. This layout requires wafers moving back and forth between work centers, but it allows the utilization of the same equipment to process wafers at different steps. For instance, all oxidation processes may be completed on the same machine or in the same work center, although the wafers are required to travel to other work centers between these oxidation process steps. Capacity allocation and machine duplication in semicon- ductor manufacturing involve the assignment of a set of wafers requiring certain process types to different machine groups, and the determination of equipment requirements. We represent the problem of assigning operations to differ- ent machine groups, where machine duplication is permit- ted, as a variation of the well-known capacitated facility location problem (CFLP). Given a set of potential locations for facilities with known capacities, the CFLP consists of assigning facilities to locations in such a way that the sum of the fixed costs of opening facilities and the variable costs of assigning customers, with known demands, to the facil- ities is minimized subject to capacity limitation at each facility. Location problems have been extensively discussed in the literature (Aikens [1], Brandeau and Chiu [6]). Baker [3], and Van Roy [18] present optimal algorithms for the CFLP. * This paper is based upon work supported in part by a Summer Research Grant awarded by the Warrington College of Business at the University of Florida. Correspondence to: S ¸ . S. Erengu ¨c ¸ (selcuk.erenguc@cba.ufl.edu); B. C ¸ atay (catay@sabanciuniv.edu); A. J. Vakharia (asoov@ufl.edu) © 2005 Wiley Periodicals, Inc.