Selective Removal of High-k Gate Dielectrics D. SHAMIRYAN, M. BAKLANOV, M. CLAES, W. BOULLART, AND V. PARASCHIV IMEC, Leuven, Belgium Continuous downscaling of integrated circuits brought an end to the era of SiO 2 . In gate dielectrics, it is being replaced by materials with high dielectric constant, so-called high-k dielectrics. One of the challenges in the integration of the high-k material is removal of those materials selectively over the substrate. This work is one of the first attempts to review current state of the art of the high-k removal. Two main approaches are discussed: dry (plasma) removal and wet removal. First, the fundamentals and limitations of both approaches are presented, then an overview of the existing experimental data is given. It is concluded that the best results could be obtained by combining the dry and wet approaches. Keywords High-k dielectrics; High-k etching; Plasma etching; Wet etching Introduction The excellent dielectric properties of SiO 2 have aided the evolution of microelectro- nics for several decades. Thermally grown SiO 2 has a low number of defects, high resistivity, large band gap, and excellent dielectric strength and provides a stable interface with Si. However, continuous downscaling of the semiconductor devices constantly brings new challenges to semiconductor device manufacturing. The dimensions of the semiconductor devices follow a trend known as Moore’s law that states that the number of transistors that can be inexpensively placed on an integrated circuit increases exponentially, doubling approximately every two years (Moore, 1965). As the dimensions are scaled down, conventional materials cannot comply anymore with the stringent requirements of scaled devices, and new materials must be inves- tigated and integrated into the existing processing technology. Scaling of the gate dielectric thickness became one of the main issues recently. Silicon dioxide has reached its limits for thinning down. Thin (<1.2 nm) SiO 2 suffers from increased gate leakage, reduced reliability, and increased dopant diffusion. It was shown that scaling SiO 2 thickness below 1.0–1.2 nm does not result in increase of transistor drive current (Timp et al., 1997). In order to alleviate further downscaling of semiconductor devices, SiO 2 is currently being replaced with materials of high dielectric constant, so-called high-k dielectrics (Wilk et al., 2001). High-k dielectrics are mostly metal oxides with k value Address correspondence to D. Shamiryan, IMEC, Kapeldreef 75, Leuven 3001, Belgium. E-mail: shamir@imec.be Chem. Eng. Comm., 196:1475–1535, 2009 Copyright # Taylor & Francis Group, LLC ISSN: 0098-6445 print=1563-5201 online DOI: 10.1080/00986440903155428 1475 Downloaded By: [Shamiryan, D.] At: 07:51 7 September 2009