Flexible Simulation and Prototyping for RFID Designs C. Angerer, B. Knerr, M. Holzer, A. Adalan, andM. Rupp Vienna University of Technology, Institute of Communications and Radio Frequency Engineering Vienna, Austria (cangerer, bknerr, mholzer, aadalan, mrupp)@nt.tuwien.ac.at * Abstract - This paper presents a flexible RFID simulation and prototyping system supporting both the 13.56 MHz domain and the 868 MHz domain, further referred to as HF and UHF domain, as well as several standards within these two frequency domains. The proposed prototyping system consists of an exchangeable ana- log RF front end supporting either HF or UHF, a protocol stack running on a DSP and a signal processing part implemented on an FPGA. Both software and configuration files for the reconfig- urable hardware running on the prototyping board, are automati- cally generated from a powerful simulation environment, which is decomposed in a link layer model and a physical layer model. The link layer model covers the protocol stack and the command gen- eration down to bit level, whereas the physical layer model addi- tionally includes simulation of the modulation and coding schemes as well as the utilised receiver architecture. This allows for the evaluation of different protocols in general and to test the corner cases of the permitted parameter ranges in realistic scenarios in particular. Furthermore, this automated design flow ensures con- sistency of the simulation and the implementation with very small design cycles. I. I NTRODUCTION RFID technology shows a continuous growth in various application fields, like commerce, logistics, medical science, security, access con- trol etc. The past trend in industry was going towards different stan- dards for each kind of application. Some improvements in untangling these mostly conflicting standards were accomplished by EPCglobal, who created widely accepted standards for product identification. The EPC Class 1 Generation 2 standard was intended to resolve discrepan- cies among RFID systems used in different parts of the world [1]. Similar to a trend in other technologies, where one electronic de- vice incorporates many different functionalities for which in the past separate devices were required, this development also emerges in the field of RFID. An urgent demand for tags and readers that are capa- ble of operating at different frequencies, from HF to UHF, offering different application scenarios exists in this field. Moreover, as long as there are competing standards within every single frequency do- main and consequently tags and readers that adhere to only one of those, the interoperability of the new tags and readers is another ur- gent demand. In short, the next generation of tags and readers shall be omnipotent. Therefore, a need emerges to focus on the interop- erability between RFID systems just as much as on the common de- mands like for example small size, low power, and low cost. Some multi-frequency approaches and multi-standard systems for adjacent frequencies have already been developed by industry. Examples in- clude Anadigm’s RangeMaster [2], an RFID reader supporting various UHF protocols, in particular the EPCglobal Gen 1 and Gen 2 (class 0, 1, 2) and ISO18000-6 standards (ver. a,b), or combined LF and HF Readers which are offered by many manufacturers, e.g. by Deis- ter Electronic [3] or Texas Instruments [4]. Some companies even provide a combination of technologies, such as Magnatec Technolo- gie GmbH [5] that has combined RFID and GSM technology into an RFID scanning system that uses the GSM cell phone network for the communication between remote readers and a base station. * This work has been funded by the Christian Doppler Laboratory for Design Method- ology of Signal Processing Algorithms. The rapid implementation and exploration of such multi- frequency, multi-standard systems is a tough challenge, since naturally multiple aspects need to be considered: first and foremost the differ- ent signalling technologies (e.g. inductive coupling vs. wave propaga- tion), simulation on a multiple levels of abstraction (protocol stack vs. hardware implementation), cross platform verification, and the need for highly automated code generation. Research on simulation models and implementation of RFID systems has been carried out by various groups, addressing different problems. Han et al. [6] presented a Matlab/Simulink model for the commu- nication between a single reader and a single tag in the UHF frequency domain. They focus on modelling the RF and analog circuit and care- fully analyse effects like oscillator phase noise, TX/RX coupling, I-Q balancing etc. Choi et al. [7] developed a PSpice and a digital VHDL simulation model for an HF reader and also present experimental re- sults. The focus of their work is on multi-tag recognition and collision avoidance. Roy et al. [8] present an RFID reader implementation on an FPGA and an RF frontend in the UHF frequency domain. Their aim is to keep the implementation simple by the preferred usage of standard components. The rationale for the described system in this paper is to respond to the need for a test environment for verification of future develop- ments of RFID systems. Therefore, we focus on a rapid prototyping approach for implementing several different standards belonging to the HF and UHF frequency domains. A powerful simulation environment on two different abstraction levels, namely a link layer and a physical layer simulation model, is introduced. This allows for a fast evalu- ation of our implementations on a very abstract level. Furthermore, an automated design flow is presented, which generates C/C++ code for the DSP and synthesisable VHDL code from both simulation mod- els. Thus, new protocols can be rapidly transformed to the prototyping system. This prototyping system consists of a DSP, an FPGA, and an analog RF frontend including a DAC and an ADC. Our architectural approach is to map all signal processing and protocol state machines into the reconfigurable components of the reader, namely FPGA and DSP, and to keep only the layout of the RF frontends for HF and UHF fixed. These RF components are kept very simple and independent from the actually implemented standard. Within minimal design cy- cles different RFID reader solutions, supporting standards of the HF and UHF frequency domain, can be evaluated on different layers, from abstract simulation levels down to verification on hardware. Additionally, the standards allow for a wide range of different pa- rameters, like coding, link timing, modulation depths, slew rate, etc. Regarding these parameters, our implementation provides full control, meaning that the complete range of these parameters can be explored in order to comprehend the limitations of the system. For instance, the maximum read distance, the maximum number of detected tags per time unit, and achievable bit error rates are of major interest for a re- alistic scenario. The rapid prototyping approach has been tested with the draft version of the EPCGlobal HF Ver. 2 standard and the EPC RFID Class-1 Gen-2 UHF standard [1, 9] as well as the ISO 15693 standard [10]. The remainder of this paper is organised as follows: Section II. introduces our design flow and design methodology. Section III. presents our link layer and physical layer simulation models. In Sec- tion IV. the rapid prototyping board is introduced, while Section V. Copyright European Association for Signal Processing, 2007, published in the proceedings of the first international EURASIP Workshop on RFID Technology, Sept. 2007 51