Analog FFT Interface for Ultra-Low Power Analog Receiver Architectures Nima Sadeghi Hessam M. Nik iCORE High Capacity Digital Communication Lab Department of Electrical & Computer Engineering University of Alberta Edmonton, Alberta Canada T6G 2V4 (nima, hessam, schlegel, vgaudet)@ece.ualberta.ca Christian Schlegel Vincent C. Gaudet Abstract— Our project is to design and implement an analog receiver including an analog decoder and a low power analog FFT processor. The FFT can be represented by a graph that is similar to the underlying graph in iterative decoders, and could potentially be implemented using comparable analog circuits with simple structures. Our system uses an OFDM with differential BPSK modulation. We simulated the system, modeled the tran- sistors mismatch and simplified the circuit for the 256-bit FFT. Our goal is eventually to design the FFT processor in CMOS 0.18μm technology in low power subthreshold regime. I. I NTRODUCTION For ultra-low power applications High Capacity Digital Communication Lab has designed an analog receiver con- sisting of a (256,121) Turbo Product Decoder [1] and we want to build an FFT interface to extend this project. We propose to use the OFDM transmission format due to its versatility and process simplicity [2]. This requires that the receiver transforms received sampled signals by a Fast Fourier Transform (FFT) to generate the LLR values required by the analog decoder. A 256-bit FFT designed and simulated in Matlab. In our simulations we considered the transistors mismatch due to the process variations and some circuit simplifications to implement it eventually using CMOS technology. Our figure of merit to design such a low-power analog FFT is not to degrade the decoder performance defined by its SNR. In this work first we look at the system level design and its mathematical representation. Then we explain the FFT structure and some circuit considerations. At the end we discuss the system performance and the simulation results. II. SYSTEM OVERVIEW At the system level we look at a communication system model which consists of a transmitter, communication channel, and receiver as shown in Fig.1. We explain each individual part in this model now and at the end we look at the bit error rate performance results. At the transmitter binary information bits are encoded by an error correcting code such as a Turbo or LDPC code in our case. A serial-to-parallel data converter gives M*N coded bits to a symbol mapping block to generate N 2 M-ary symbols. We will concentrate on BPSK, i.e., M=1. The mapping is differential to avoid phase recovery. The Inverse IFFT Serial To Parallel Encoder . . . " b " c 1 c MN c {-1, +1} Transmitter Symbol Mapping Circular Differential Modulator . . . 1 d N d MN coded bits N M-arry symbols Decoder . . . " ˆ b 1 r MN r Receiver . . . 1 y N y S RF (t) j 2"#f ( t ) e n(t ) AWGN Offset frequency RF Up- conversion I/Q Channel model at the receiver S 1 1 n S n Timing information available . . . RF Down- conversion j 2"#f1 e sn n j 2"#fn e Channel s T = T N S n" T s) Serial To Parallel I/Q FFT Complex Multiplier I/Q I/Q N noisy M-arry symbols MN estimated bits S b t () Fig. 1. OFDM communication system model. Fast Fourier Transform (IFFT) creates an orthogonal frequency division multiplexed (OFDM) transmission signal. The IFFT creates both in-phase and quadrature channels. After RF up-conversion, the complex equivalent baseband signal S(t) with a symbol period [0,T], containing S I (t) and S Q (t), is transmitted. At the receiver, the RF signal is down-converted. The signal is sampled at times nT s producing S(nT s ) = S n where T s = T N . We assume that the timing information is available at this point. After sampling, we can model the channel at the receiver. We add additive white Gaussian noise (AWGN), and consider frequency offsets, e j2πΔf k , multiplying each sample. The n noisy samples are demodulated by an N point FFT processor. For symbol detection, we use a circular differential demodulator in which we multiply adjacent samples to cancel out the unknown common phase offset. The estimated samples are delivered to the error control decoder to recover the original transmitted bits. A. Mathematical View of the System 1) OFDM Transmitter: The data symbols d n for the differ- ent frequency channels are in general complex, i.e., d n = a n + jb n . Using the IFFT generates the I/Q baseband waveform S b (t)= S I (t)+ jS Q (t) where