IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 52, NO. 5, OCTOBER2003 1533 Micro-Prober for Wafer-Level Low-Noise Measurements in MOS Devices Carmine Ciofi, Felice Crupi, Calogero Pace, and Graziella Scandurra Abstract—Low-frequency noise measurements represent an interesting investigation technique for the characterization of the quality and reliability of microelectronic materials and devices. Performing meaningful noise measurements at low and very low Hz frequencies, however, may be quite challenging, particularly because of the many sources of interferences that superimpose to the noise signal. For this reason packaged samples are preferred because they allow accurate shielding from the external environment, and because keeping the sample in close proximity to the low-noise biasing system and amplifier reduces microphonic and electromagnetic disturbances. Notwithstanding this, the possibility of performing low-frequency noise measure- ments at wafer level would be quite interesting, both because of the ease of obtaining wafer-level samples from industries with respect to packaged samples, and because this would avoid possible packaging-process induced device degradation. The purpose of this work is to demonstrate that it is, in fact, possible to design and build a dedicated probe system for performing high-sensitivity, low-frequency noise measurements on metal–oxide–semicon- ductor devices at wafer level. Index Terms—Metal–oxide–semiconductor (MOS) devices, noise measurement, spectral analysis, wafer-level measurements. I. INTRODUCTION T HE EVALUATIONof the current or voltage spontaneous fluctuations, commonly referred to as noise measure- ments, represents an important investigation technique for the characterization of microelectronic materials and devices [1], [2]. One of the most relevant applications of this technique is in the field of thin-oxide metal–oxide–semiconductor (MOS) structures characterization. By using this kind of investigation, significant insights have been obtained in the understanding of the charge transport mechanisms and of the defects properties at different oxide degradation stages. As an example, it has been proposed that the observed noise is due to the superposition of several individual fluctuators consisting of electron traps inside the oxide or at the interface [3]. It has also been shown that the oxide breakdown is always preceded by random telegraph noise in the gate current [4]. Moreover, the partial reduction of the shot noise level in MOS structures after a high field stress has been used as a strong proof that the observed stress-induced leakage currents are due to trap-assisted tunneling [5]. Because of the presence of many interferences sources, it is normally quite difficult to perform Manuscript received May 26, 2002; revised June 23, 2003. C. Ciofi and G. Scandurra are with the Dipartimento di Fisica della Materia e Tecnologie Fisiche Avanzate and INFM, Messina, Italy (e-mail: ciofi@ingeg- neria.unime.it). F. Crupi and C. Pace are with the Dipartimento di Elettronica, Informatica e Sistemistica and INFM, Rende, Italy. Digital Object Identifier 10.1109/TIM.2003.817913 meaningful noise measurements, particularly in the case in which we are interested at very low frequencies Hz , where most important phenomena become apparent [6]. In order to obtain accurate results, a suitable shielding from the external environment is necessary. Therefore, packaged samples are preferred because they allow having the sample in close proximity to the low noise biasing system and amplifier, thus reducing the effects of electromagnetic disturbances, which increase as the length of the cabling increases. In fact, in the case of wafer-level measurements, the large size of the probe station chamber would require long cables for connecting the device under test (DUT) to the noise measurement system. Moreover such devices as the vacuum pump used to hold the wafer in place would introduce intolerable mechanical vibrations. Finally, in most cases, a considerable level of noise is generated at the point contact between the probe tips and the DUT pads. Notwithstanding these difficulties, it would be quite interesting to succeed in performing low-frequency noise measurements at wafer level both because of the ease of obtaining wafer-level samples from industries with respect to packaged samples, and because this would prevent possible packaging process induced device degradation. In the case of MOS structures, at least the problem of the tips contact noise, which is proportional to the square of the dc current [7], can be neglected because of the low conduction current which is normally observed when performing noise measurements [8]. While in the case of high-frequency noise measurements wafer-level characterization systems are routinely employed [9], [10], this is not the case in the field of low-frequency noise measurements. In this paper, we demonstrate that it is in fact possible to design and build a dedicated probe system for performing high sensitive low-frequency noise measurements on MOS devices at wafer level. II. PROPOSED APPROACH As we have noted above, a close proximity between the DUT and the noise measurement system in a carefully shielded environment is essential for performing sensible low-frequency noise measurements. For this reason, in view of the peculiarity of noise measurements with respect to other characterization techniques, we renounced to the possibility of realizing a probe system capable of hosting an entire today standard 8-in wafer. The sample holder top plate is a circle with a diameter of 3 cm and can therefore host quite large dies as those used for containing several test structures. A schematic view of the system we have realized is reported in Fig. 1(a), while Fig. 1(b) shows a photograph of the entire system. The entire structure of the system is obtained starting from two 4-mm-thick aluminum 0018-9456/03$17.00 © 2003 IEEE