High-level simulation and modeling tools for mixed- signal front-ends of wireless systems Piet Wambacq, Gerd Vandersteen, Petr Dobrovolnỳ, Michael Goffioul, Wolfgang Eberle, Mustafa Badaroglu, Stéphane Donnay IMEC vzw Kapeldreef 75 3001 Heverlee, Belgium Abstract Wireless applications such as WLAN, GSM, DECT, GPS, … require low-cost and low-power transceivers. Moreover, a high flexibility is required when wireless terminals will have to cope simultaneously with several standards. To achieve this, while maintaining high performance, the possibilities of analog and digital signal processing need to be combined in an optimal way during the realization of a transceiver. This is only possible when system designers can efficiently study tradeoffs between analog and digital. Making such tradeoffs is too complicated for pen-and-paper analysis. Instead, efficient simulation of mixed-signal architectures with detailed models for the different building blocks is required. This paper discusses high-level modeling and simulation approaches for mixed-signal telecom front-ends. Comparisons to commercial high-level simulations show an important reduction of the CPU times of typical high-level simulations of telecom transceivers such as bit-error-rate computations. This efficient simulation approach together with the accurate modeling tools, that include substrate noise coupling, form an interesting suite of tools for advanced architectural studies of mixed-signal telecom systems. 1 Introduction Front-ends of telecom transceivers perform the combination of downconversion, removal of interferers by filtering, channel selection and amplification in the receive path, and upconversion and amplification in the transmit path. These functions are implemented partially in the analog and partially in the digital domain. The amount of digital signal processing is steadily growing in modern telecom systems. The digital world offers a higher flexibility compared to analog blocks, and can – at least partially – compensate some of the signal impairments caused by analog front-end blocks. To predict the effectiveness of complicated digital compensation algorithms, the analog and the digital blocks need to be simulated together. Transistor-level simulations are not feasible to this purpose. Even a co-simulation of digital blocks at a higher abstraction level with analog blocks at the transistor level, as is possible e.g. in SABER [1], is not feasible. Indeed, typical measures of telecom systems are bit-error-rates, packet-