IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. zyxwv 25, NO. 3, JUNE 1990 856 Op Amp Combining Precision, High Speed, and High Output Current Drive for +5-V Power Supply Operation zy ed O Abstract -A monolithic operational amplifier designed for zyxwvuts f 5-V power supply operation is described. Precision dc performance includes 100- million V / V open-loop gain, k25-pV maximum input offset voltage, L-40-nA maximum input bias current, and 2.4-nV/& (at 1 kHz) input voltage noise. AC performance includes 9-V/ps slew rate, 17-MHz bandwidth, and 1-ps settling time to zyxwvutsrq 0.1%; all are measured at unity gain. The op amp is capable of directly driving into a zyxwvuts 50-0 load with up to f 80 zyxwvutsrqponm mA of output drive current. A novel input bias current cancella- tion circuit [l] achieves the low input bias current while maintaining a f3.5-V minimum common-mode input voltage range. A new output short-circuit protection circuit [2] was developed which provides good current limiting while allowing an output voltage swing of 4 V. A novel input offset voltage trimming scheme [3] using laser link cutting is introduced which consumes minimum die area while providing a zyxwvuts f 10-pV trim solution ( k 3-mV trimming range), and excellent long-term stabil- ity. 1. INTRODUCTION HE TREND to integrate more analog/digital func- T tions into one system leads to a need to develop a high-performance op amp which operates at low supply voltages. Since + 5 V is a standard supply for TTL and CMOS, and -5.2 V is an ECL standard supply, an op amp which operates with a k5-V supply fits readily into the system. In many cases, the need for a _+15-V power supply is eliminated. Most precision op amps operate nominally with f 15-V power supply. The inputs and output of these op amps can only swing to within 2-3 V of the power-supply rails (i.e., k12 to k 1 3 V of a k15-V supply). When these circuits are operated with f 5 V, the input and output voltage range is very limited, and their performance is degraded as well. In addition, these precision op amps are unable to drive the low impedances associated with high- frequency systems, forcing the designers either to use an extra buffer amplifier or a hybrid op amp. zyxwvut CBA Also, precision op amps usually have a fairly large die size due to big on-chip compensation capacitors and offset voltage trim- ming circuitry. For instance, the industry standard OP-27 Manuscript received April 10, 1989; revised January 10, 1990. The authors are with Motorola Inc., Tempe, AZ 85284. IEEE Log Number 9035673. can only deliver f20-mA output drive current and re- quires a total of 370-pF on-chip capacitors for frequency compensation [4]. The goal of this design is to achieve a large input and output voltage range for low-power-supply voltage opera- tion, high-output-drive current capability, improved ac performances, and reduced chip area. Consequently, a high-performance precision op amp has been fabricated on a standard low-cost 15-V (min BV,,, = 7 V) bipolar process which achieves a large input common-mode volt- age range (VcC-l..5 V, VEE+1.5 V minimum), near rail-to-rail output voltage swing (V,, - 0.8 V, V, , + 0.2 VI, k80-mA output current drive into a 5 0 4 load, and unity-gain stability with total on-chip compensation capac- itance of 106 pF, resulting in a small die size of 86x42 mils, plus all the precision characteristics of a typical precision op amp: A , > 100 million V/V, qOs < k 25 pV, I,, < *40 nA, E,, = 2.4 n V / m , etc. 11. INPUT STAGE To achieve ultrahigh open-loop voltage gain, a three- gain-stage architecture is used. The input stage should have very high input impedance, low input bias current, low input offset voltage, and low input equivalent noise. Also, it should provide adequategain and input common-mode input voltage range. Most of the existing three-stage op-amp designs accomplish the above require- ments at the expense of the input common-mode voltage range [41. Existing designs operating at k 15 V have +5 V of “headroom” to work with. Fig. 1 shows a typical precision op-amp input stage [4]. In this design, the input can swing within V, , -4Vbe and V, , +4Vb,, which trans- lates to k1.8-V input common-mode voltage range for +5-V supply. Thus, in a +5-V supply design, to achieve adequate input common-mode voltage range, no more than 1.5 V can be dropped across the load element of the input emitter-coupled pair. In order to achieve the gain and input rangerequired, an n-p-n input stage with balanced active p-n-p load is used along with novel input bias current cancellation circuitry [l]. 0018-9200/90/0600-0856$01.00 01990 IEEE