IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308 _______________________________________________________________________________________ Volume: 03 Issue: 08 | Aug-2014, Available @ http://www.ijret.org 452 SET and SEU Analysis of CNTFET Based Designs in Harsh Environments Ameet Chavan 1 , P. Darpana Reddy 2 1 Professor, ECE Department, Sreenidhi Institute of Science and Technology, Telangana, India 2 Student, University of Massachusetts at Amherst, USA Abstract Over the past decade CNTFET has become one of the strong contender to replace Silicon by offering high performing power efficient nanoelectronics. However, no study has been published that evaluates CNTFETs based designs for SETs and SEUs due to radiation. This paper presents a comparative analysis of existing designs of latches and logic circuits using CNTFETs (32 nm Stanford models) and MOSFETS (45nm IBM FDSOI) for power, performance and radiation robustness. In the analysis CNTFET logic gate designs demonstrated on an average 45% improved resilience to SETs as compared to MOSFET based designs. CNTFET’s energy and delay metrics for latches showed an improvement by two orders over MOSFETs with higher robustness. In the interconnect crossbar analysis, the CNTFETs implementation showed better resilience in minimizing the effect of SET transients by occupying 25% lesser area and consuming 4 times lower energy than MOSFETs implementation to handle same levels of Qcrit. . Key Words: CNTFETs, Single Event Upset (SEU), Single Event Transient (SET), Radiation Robustness --------------------------------------------------------------------***---------------------------------------------------------------------- 1. INTRODUCTION The limitations of Silicon based technology such as increased leakage currents, low drive capability and low ON-current has forced the semiconductor industry to look for an alternative beyond Silicon. Single-Electron Transistor (SET), InGaAs transistor, Rapid Single-Flux Quantum Logic, Quantum Cellular Automata (QCA) and Carbon Nano Tubes (CNT) are among the investigated solutions. However, CNTs implemented with innovative process enhancements have shown to overcome the limitations in developing nanoelectronics. Since the first CNTFET was reported in 1998 tremendous research work has been carried out in the field of CNTFET science and technology including materials, devices and circuits [1-3]. They have diameters between 1 to 3 nm and having lengths up to several microns. CNTs have been utilized to build both low-resistance high-strength interconnections and highly scalable low-power Carbon Nano Tube Field-Effect Transistors (CNTFET). The unique properties of Carbon Nano materials, in particular Single- Walled Carbon Nano Tubes (SWCNTs), have gained much attention due to their potential as high-performance device [4]. The improved channel transport and high gate capacitance of the CNTFETs fuelled a threefold increase in the ON-current when compared to MOSFETs. Their compatibility with high k-dielectrics is a huge advantage. In addition CNTFETs have four times higher transconductance when compared to MOSFETs. Further, for reliable electronics with CNTFETs, active research is being carried on to overcome the listed challenges. They include: 1) Perfect alignment and positioning of CNTs; 2) Chirality control for metallic or semiconducting properties; and 3) Performance variations; 4) Yield reduction, and 5) Increased susceptibility to noise 1.1 Physical Features of CNTFETs CNTFET is a Field-Effect transistor that makes use of a single Carbon Nano Tube or an array of Carbon Nano Tubes as the channel material instead of Silicon. A Single-Wall Carbon Nano Tube (SWCNT) is formed by rolling a single sheet of Graphene. A CNTFET is a three-terminal device consisting of a semiconducting Nano Tube bringing two contacts (source, drain) together, and acting as a carrier channel, that is turned on or off via the third contact (gate). Fig 1: Physical Properties of a CNTFET The electrical properties of Nano Tubes, deeply depends on its structure. CNTFET can be either metallic or semiconducting, depending on the chirality vector (m, n), i.e. the direction in which the Graphene sheet is rolled. The diameter of the CNT is related to the chirality vector as shown in equation (1) D CNT = (a ⁄ Π)*࢓ ૛ + ࢔ ૛ + ࢓࢔ ૚ ૛ ------- (1) Where a=2.9A o . Also, semi-conducting Nano Tubes are direct band-gap semi-conducting with band-gap Eg≈0.9/d