Defect-Free AFM Scratching at the SiÕSiO
2
Interface
Used for Selective Electrodeposition of Nanowires
J. Michler,
a
R. Gassilloud,
a,b
Ph. Gasser,
a
L. Santinacci,
b,
*
,c
and P. Schmuki
b,
**
,z
a
Materials Measurement Research Group, Swiss Federal Laboratory EMPA, CH-3602Thun, Switzerland
b
Departement of Materials Science, University of Erlangen-Nuremberg, D-91058 Erlangen, Germany
We demonstrate selective electrodeposition of Pd into atomic force microscopy AFM nanoscratches produced in thermal oxide
covered p-type Si100 without creating substantial damage in the silicon substrate. A 10 nm thick thermal SiO
2
film was scratched
about 5-7 nm deep with a diamond tip of an AFM. Then, etching in HF was used to remove uniformly 4-5 nm SiO
2
, thus to
expose the Si within the nanoscratches while still maintaining an oxide layer on the rest of the surface. Pd was selectively
electrodeposited into these scratches. The underlying silicon exhibits no significant damage induced by scratching.
© 2004 The Electrochemical Society. DOI: 10.1149/1.1643791 All rights reserved.
Manuscript submitted July 28, 2003; revised manuscript received August 27, 2003. Available electronically January 22, 2004.
Approaches to produce nanostructures have become increasingly
important over the past few years. Many techniques are based on
scanning probe microscopies such as scanning tunneling microscopy
STM and atomic force microscopy AFM. Local oxidation of
silicon surfaces by STM or AFM has been used for surface pattern-
ing in the sub-100 nm range.
1-3
AFM can also be used to nanoma-
chine surfaces in the micro and nanoscale, e.g., in scratching and
wear experiments.
4
This type of study showed that it is possible to
produce nanosize grooves on silicon surfaces using an AFM
equipped with a single-crystalline diamond tip mounted on a stiff
cantilever spring constant 10 N/m). Recently it has also been
demonstrated that it is possible to exploit AFM-induced nano-
scratches produced through the native oxide layer on silicon for
selective electrochemical copper deposition.
5
Also thicker 10 nm
oxide films can serve as an efficient mask, i.e., may be used to
suppress electrodeposition outside the scratched locations. The latter
approach has been used to achieve selective electrochemical depo-
sition of copper and palladium on oxide-covered silicon surfaces
with a submicrometer lateral resolution.
6
Most recently, organic
monolayers were used as an AFM scratch resist for Cu immersion
plating on Si.
7
However, one common drawback of all these scratch-
ing approaches is that deformation of the single-crystalline substrate
takes place. Depending on the scratching parameters, different crys-
tal planes are exposed and defects such as dislocations can be intro-
duced leading to an undesired undefined structure of the metal/
silicon interface.
In this work the goal was to avoid any structural deformation of
the silicon surface by the following measures: ( i ) A two-step ap-
proach was used to define the pattern in the SiO
2
. In the first step,
the oxide was only partially removed by scratching. In the second
step, the remaining oxide layer inside the scratches was removed by
a timed HF etch leaving oxide coverage on the rest of the surface.
( ii ) The loads on the tips used for scratching the oxide were con-
trolled and kept below the dislocations Tresca shear stress and
phases transformation hydrostatic pressure threshold of silicon.
All experiments were carried out on silicon 100 wafers p-type:
= 1-10 cm) that carried a 10 nm thick thermal oxide layer.
Samples were prepared by cleaving pieces of 1.2 1.2 cm. These
pieces were degreased by sonicating in acetone, isopropanol, metha-
nol, then rinsed with deionized water and blown dry in an Ar jet.
AFM scratching and imaging were performed with a PicoSPM mi-
croscope from Molecular Imaging driven by a Nanoscope E control-
ler from Digital Instruments. The tip was a single-crystal diamond
tip mounted on a stainless steel cantilever spring constant
= 250 N/m). For scratching a force of 50 N was employed and
for imaging a force of 200 nN was used. Scratches were made by
scanning the sample in the x or y direction at 40 m/s for a deter-
mined number of cycles ( N ) to create a measurable wear trace on
the surface. After scratching, about 3-5 nm of oxide layer was re-
moved by dipping the samples in 1% HF for 30 s. This step is
designed to remove the remaining oxide in the scratch but leave
sufficient oxide on the rest of the surface to act as a resist. Addition-
ally, the exposed area in the grooves is H-terminated and thus pas-
sivated.
The electric contact to the Si electrode was established by smear-
ing InGa eutectic on the back side of the samples. The samples were
then pressed against an O-ring of the electrochemical cell leaving
0.785 cm
2
exposed to the electrolyte. For Pd deposition the electro-
lyte consisted of 0.01 g/L PdCl
2
+ 0.1 M HCl and was prepared
from analytical grade chemicals and deionized water. Electrodepo-
sition was carried out with a potentiostat Jaissle 1002 T-NC and a
conventional three-electrode setup using a Pt mesh as a counter
electrode and a Ag/AgCl electrode ( E = 236.3 mV vs. a saturated
calomel electrode, SHE as a reference electrode. For deposition, the
samples were polarized first during 5 s at -800 mV vs. Ag/AgCl
and then during 30 s at -400 mV vs. Ag/AgCl.
Cross-sectional transmission electron microscopy XTEM
samples were prepared using a dual-beam focused ion beam FIB
FEI Strata DB 235 installation. To protect the surface of the samples
during the ion milling process, a 150 nm thick layer of platinum was
deposited over the surface by electron beam induced deposition
within the FIB instrument, followed by ion beam deposition of 1.5
m platinum as top layer. Scanning electron microscopy SEM
micrographs were acquired with the Strata DB 235 that was
equipped with a field emission gun. A Philips CM30 transmission
electron microscope operated at an acceleration voltage at 200 kV
was used to study the microstructure.
Figure 1 shows a typical AFM profile of scars produced by AFM
scratching. The width and depth of the scratches are approximately
300 and 5-7.5 nm, respectively. The open angle of the V-shape
scratch corresponds to about 175°. As the thickness of the oxide
layer originally was 10 nm, scratching did not remove the complete
oxide layer. By a subsequent HF etch of 30 s, about 3-5 nm SiO
2
were removed. This led to an oxide-free and H-terminated Si surface
within the scratches, whereas on the rest of the surface approxi-
mately 5 nm of oxide was left. The etch rate was determined from a
series of calibration experiments using the same thermal SiO
2
layer,
etching in 1% HF and determining the thickness as a function of
etch time from Auger electron spectroscopy AES sputter depth
profiles.
In Fig. 2 an SEM image after electrodeposition of Pd on the
nanoscratched and etched surface is shown. Clearly, deposition of
Pd takes place with a high selectivity within the scratches. No Pd
crystallites are present outside the scratched area. However, the
* Electrochemical Society Student Member.
** Electrochemical Society Active Member.
c
Present address: MADIREL Laboratory, University of Provence, CNRS,
Marseilles, France.
z
E-mail: schmuki@ww.uni-erlangen.de
Electrochemical and Solid-State Letters, 7 3 A41-A43 2004
0013-4651/2004/73/A41/3/$7.00 © The Electrochemical Society, Inc.
A41