Implementation of Spectral Subtraction Method on FPGA using High-Level Programming Tool Mohammed Bahoura Department of Engineering, Universit´ e du Qu´ ebec ` a Rimouski, 300, all´ ee des Ursulines, Rimouski, Qc, Canada. Hassan Ezzaidi Department of Applied Sciences, Universit´ e du Qu´ ebec ` a Chicoutimi, 555, boul. de l’Universit´ e, Chicoutimi, Qc, Canada. Abstract— This paper presents a real-time architecture of spectral subtraction technique applied to speech enhancement. The proposed architecture is easily and quickly implemented on Field Programmable Gate Array (FPGA) using high-level programming tool in MATLAB/SIMULINK environment. Speech enhancement results obtained with fixed-point format implemen- tation are compared to those obtained with the floating-point format one. The maximum operating frequency and resource utilization are presented for a Virtex-6 FPGA chip. I. I NTRODUCTION Spectral subtraction method was originally introduced by Boll [1] for speech enhancement. An improved version was proposed by Berouti et al. [2] to reduce the residual musical noise. Other improvements have been suggested in the last three decades. The spectral subtraction approach has been also applied to other kinds of sounds like underwater sounds [3], respiratory sounds [4], etc. These methods are firstly evaluated using software platform such as MATLAB. However, real- world applications such as hands-free devices, cellular phones or hearing aids require real-time implementation of these speech enhancement algorithms. The hardware implementa- tion of these algorithms is a great challenge that requires a tradeoff between complexity, computation speed and efficiency of these algorithms. In the last two decades, several spectral subtraction based architectures are implemented on digital signal processor (DSP) for real-time speech enhancement. However, at the best of our knowledge, only few ones are implemented on Field Programmable Gate Array (FPGA) [5], [6] the last years. Implementation on FPGA can be done using hardware description language (HDL) such as VHDL and Verilog, or using high-level programming tool such as Xilinx system generator (XSG) [7]. In fact, XSG enables the use of MATLAB/SIMULINK environment to create and verify hardware designs for Xilinx FPGAs quickly and easily. It provides a library of SIMULINK blocks bit and cycle accurate modeling for arithmetic and logic functions, memories, and DSP functions. It also includes a code generator that automat- ically generates HDL code from the created model [8]. In this paper, we propose an FPGA implementation architec- ture of the spectral subtraction method for speech enhancement using XSG. Not like the previously published architectures, the proposed one is very simple and allows one to implement this algorithm easily and quickly on FPGA. II. SPECTRAL SUBTRACTION The noisy signal y(t) is assumed to be composed of the clean signal s(t) and the uncorrelated additive noise d(t). y(n)= s(t)+ d(t) (1) In the frequency domain, equation (1) becomes Y (ω)= F{y(n)} = S(ω)+ D(ω) (2) where Y (ω), S(ω) and D(ω) are the Fourier transform of the corresponding signals. The Fourier transform of the corrupted signal can be expressed in polar form Y (ω)= |Y (ω)|e jϕy(ω) , where |Y (ω)| and ϕ y (ω) are the magnitude and the phase of Y (ω), respectively. The spectral subtraction techniques are based on the prin- ciple that an estimate of the clean signal spectrum can be obtained by subtracting an estimate of the noise spectrum from the noisy signal spectrum. To ensure non negative magnitude spectrum, the first approach used a simple half- wave rectifier [1]. |  S(ω)| = max  |Y (ω)|-|  D(ω)|, 0  (3) where the noise spectrum |  D(ω)| is estimated by its average value taken during non-signal periods. However, this process is accompanied by perceptually annoying noise, namely musical noise. Berouti et al. [2] proposed a modified spectral subtrac- tion method to reduce the residual musical noise. It consists in subtracting an overestimate of the noise power spectrum and limiting the resultant spectrum from going below a preset minimum level (spectral floor). |  S(ω)| γ = max  |Y (ω)| γ - α|  D(ω)| γ ,β|  D(ω)| γ  (4) where α ≥ 1 is the over subtraction factor and 0 < β << 1 is the spectral flooring parameter. γ is the exponent determining the transition sharpness, with γ =1 providing magnitude spectral subtraction [1] or γ =2 for power spectral subtraction [2]. The enhanced signal spectrum is obtained using the mag- nitude estimate |  S(ω)| of the enhanced signal and the phase ϕ y (ω) of the corrupted input signal.  S(ω)= |  S(ω)|e jϕy(ω) (5)