Field emission in lateral silicon diode fabricated by atomic force microscopy lithography J. Rouhi, S. Mahmud, S.D. Hutagalung and N. Naderi A novel vacuum lateral silicon diode was fabricated using atomic force microscopy (AFM) lithography to characterise field emission. The silicon diode was approximately 100 nm thick, with an exceptionally smooth surface, and included a finger-like emitter with a gap width of 35 nm. From the Fowler-Nordheim, equation, the field enhancement factor (b) and the field emitting area (A) were assessed to ascertain the high emission current and the low turn-on voltage. The very small emitting area was obtained due to the extremely sharp cathode and very small radius of the anode tip curvature. The turn-on voltage of the diode was 8 V, the smallest value ever reported for lateral silicon field emission diodes. Introduction: Field emission (FE) studies based on nano-gap electrodes have become very important for emerging electronics owing to the broad application of nano-devices in high-brightness/low-power flat-panel displays, electron beam lithography (EBL), and sensors, among others [1, 2]. FE is a quantum mechanical tunnelling phenomenon in which electrons are accelerated from an emitting material towards an anode through a barrier (vacuum) by a very high electric field. A strong electric field lowers the barrier, making it sufficiently penetrable. The phenom- enon is highly dependent on both the shape and the material of the cathode. Sharp edges and materials with higher aspect ratios produce higher field-emission currents [3]. A number of techniques for the fab- rication of nano-gap electrodes have been reported so far, such as chem- ical–mechanical polishing, nano-imprint lithography, electro-migration methods, electroplating, focused ion beam lithography, and electron beam lithography. Local anodic oxidation (LAO) lithography using atomic force microscopy (AFM) is a convenient method for creating nanometre-scale structures and nano-electronic devices [4]. In the present study, the FE properties of the lateral silicon diode fabricated via the LAO method and tetramethyl ammonium hydroxide (TMAH) wet etching were examined. Design of vacuum lateral silicon diode: The lateral Si field emitter was physically fabricated using the LAO process and anisotropic TMAH wet etching; the process schema is shown in Fig. 1. starting material: SOI wafer Si Si a b c d Si Si SiO 2 SiO 2 SiO 2 Si Si SiO 2 SiO 2 Si Si anode cathode SiO 2 silicon oxide mask transfered; LAO method silicon oxide etch: diluted HF solution Si etching to transfer lateral device pattern: TMAH wet etching Fig. 1 Schematic drawing for fabrication of lateral Si diode The fabrication was created via the transferring of the oxide mask on an SOI wafer (with an oxide layer buried 150 nm and a 100 nm-thick device layer) via the LAO method. The p-type silicon device layer had a ,100. oriented single crystal with a resistivity of 1 to 10 V.cm. After RCA cleaning, LAO was performed on the SOI layer to transfer the oxide mask. The particulars of the anode and cathode oxide mask are shown in Fig. 2. 10 10 15 15 5 5 20 [nm] 0 0 1500 nm 1500 nm 340 nm 500 nm 160 nm Si SiO 2 [μm] Fig. 2 AFM image of oxide mask fabricated by LAO process AFM nanolithography was performed with the Cr/Pt coated tip in contact mode. The resonance frequency and force constant were 13 KHz and 0.2 N/m, respectively. Next, anisotropic TMAH wet etching with 25% concentration was used to transfer the lateral device pattern. A final silicon oxide etching step allowed the removal of the oxide mask, and a segment of the SiO 2 layer of the SOI substrate helped by functioning as the isolating material. The silicon oxide etch was performed using a diluted hydrofluoric acid (HF 10%) solution for 60 s. Post-fabrication, the lateral devices were subjected to the RCA chemical cleaning procedure, a standard process in the silicon wafer industry, to remove any contaminants present on the emitter surface. 10 10 15 15 0 5 100 [nm] 5 0 [μm] SiO 2 Si a b Mag = 5.00 K X anode cathode r ~5 nm Fig. 3 FESEM and AFM images and profile of lateral Si diode a FESEM b AFM Device fabrication results: The silicon lateral diode with a 35 nm gap width was fabricated using AFM lithography. The silicon finger-like emitter had a sharp apex to improve the geometrical field enhancement factor (b). A 5 nm planar lateral radius of the curvature of the emitter tip was obtained by a combination of the anisotropic TMAH wet etching and precise control of the LAO processes in fabrication. The 150 nm- ELECTRONICS LETTERS 7th June 2012 Vol. 48 No. 12