JOURNAL OF INFORMATION SCIENCE AND ENGINEERING 20, 127-141 (2004) 127 On the Array Embeddings and Layouts of Quadtrees and Pyramids * GENE EU JAN, SHAO-WEI LEU + AND CHENG-HUNG LI ++ Department of Computer Science + Department of Electrical Engineering National Taiwan Ocean University Keelung, 202 Taiwan E-mail: {b0199, + b0119}@mail.ntou.edu.tw ++ Department of Electronic Engineering National Taiwan University of Science and Technology Taipei, 106 Taiwan E-mail: D9102102@mail.ntust.edu.tw Quadtree and pyramid structures have attracted considerable attention in recent years. They are increasingly being applied to the fields of digital image and signal proc- essing. As a result, the efficient embedding of these structures in VLSI arrays has be- come an important research topic. In this paper, we propose three schemes to embed either quadtrees or pyramids in a rectangular, hexagonal, or octagonal mesh, respectively, with three different node shapes for VLSI layout. Our analyses show that the best achievable node utilization is 67% when embedding either structure in an octagonal mesh. This result outperforms the best utilization recorded in literature by 25%. Our study also indicates that the octagonal node gives the most favorable compromise be- tween high area utilization desired and routing space required among the processing nodes. Keywords: quadtree, pyramid, embedding, mesh, VLSI layout 1. INTRODUCTION Quadtree and pyramid structures [1, 5, 6, 9, 13] have been used extensively to rep- resent two-dimensional data in applications such as image processing and geographic information systems. Despite their structural simplicity and regularity, two-dimensional quadtrees and three-dimensional pyramids are difficult to implement on VLSI due to layout complexity. It is also known that, when building a multiprocessor on a VLSI chip, communication is more expensive than computation. Nevertheless, each processing ele- ment in tree-like structures has limited connectivity, which means that the impact of the communication channels on chip area will also be limited. To take advantage of this im- portant property, suitable placement and mapping strategies need to be devised. The embeddings of binary trees have been studied extensively [4, 5, 10, 16]. It has been found that when embedding a binary tree in a hexagonal or octagonal mesh topol- Received January 31, 2003; accepted July 4, 2003. Communicated by Shiuh-Pyng Shieh. * A preliminary version of this paper was presented at the 2002 International Computer Symposium, 2002.