Conformal Mapping Based DC Current Model For Double Gate Tunnel FETs Arnab Biswas, Luca De Michielis, Cem Alper, Adrian M. Ionescu Nanoelectronic Devices Laboratory, Ecole Polytechnique Fédérale de Lausanne, Lausanne, Switzerland e-mail: arnab.biswas@epfl.ch Abstract— In this work, the conformal mapping technique is applied to obtain an analytical closed form solution of the 2D Poisson’s equation for a double-gate Tunnel FET. The generated band profiles are accurate in all regions of device operation. Furthermore, the current levels are estimated by implementing the non-local band-to-band tunneling model from Synopsys Sentaurus TCAD. A good agreement with simulations for varying device parameters is demonstrated and the advantages and limitations of the new modeling approach are investigated and discussed. I. INTRODUCTION Tunneling Field Effect Transistors (TFETs) are very promising devices to respond to the demanding requirements of future technology nodes [1]. The benefits of the TFET are specially linked to their potential for its sub-60mV/decade subthreshold swing, a prerequisite for scaling the supply voltage well below 1V. Recently, extensive experimental and simulation works have been done on TFETs, but an accurate predictive model that facilitates circuit and system-level design is still needed. Some previous works such as [2], [3] are based on the simplified Kane’s model [4] originally developed for two terminal diodes only. Kane’s model does not properly account for the occupancy function dependence on the terminal bias for three terminal devices. For this reason compact models based Kane’s approach might lead to inaccurate results such as non-zero drain current at zero V D when applied to TFETs [5]. An approximate Taylor series solution for the channel potential is used in [3], [6] to calculate the tunneling current. Although this method accounts for 2D electrostatics, the results presented are not applicable to all operational regimes, as the effect of mobile charges in strong inversion condition is not taken into account. A recently presented model for double-gate tunnel FETs (DG-TFET)s [7], works well for low gate coupling but is not able to predict current levels accurately for stronger gate coupling with thinner and high-k gate dielectrics, which is essential for boosting the low current levels in TFETs [8]. A simplified model that captures the non- local nature of tunneling and bias dependencies of the occupancy functions in all operation regimes is essential to study circuit and system level design with TFETs. II. MODEL DESCRRIPTION Figure 1 shows the electrostatic potential at the surface of a DG-MOSFET compared to a DG-TFET at V S = 0V and V G =V D =0.5V. The gate work function is 4 eV for both devices. The inset shows the electron density plots from numerical simulations. Also shown are the boundary conditions of the potential solution at source and drain end. There is a gradual potential drop across the channel for the MOSFET, while for the TFET, most of the potential drops across the source/channel tunneling junction and the channel resistance is negligible as shown in Fig. 1. This also means that the Quasi Fermi potentials are different in the channel region of a TFET. The current in a TFET has an exponential dependence to the tunneling length [7] which depends on the band profile. For this reasons an accurate band profiling in a TFET is both challenging and essential. Fig. 1. Potential profile ψ s (x) at the Silicon/Oxide for an n-type DG- MOSFET(green) and an n-type DG-TFET(red) with the same device parameters except the source doping (n+/p+). Inset shows the electron density of the two devices at the given bias. In this work we consider a n-type DG lateral p-i-n TFET as shown in Fig. 1. A gate length L g =100 nm, channel thickness of t Si =20nm, gate oxide thickness t ox =3 nm with HfO 2 dielectric, source (drain) doping of Boron (Arsenic) at 3e20 cm -3 and channel doping of 1e15 cm -3 were used for most of the simulations unless otherwise specified. For simplicity we consider abrupt doping profiles and ignore band gap The research leading to these results has been funded by the European Community’s Seventh Framework Program (FP7/2007-2013) under grant agreement n° 257267.