Diamond and Related Materials 12 (2003) 1231–1235 0925-9635/03/$ - see front matter  2002 Elsevier Science B.V. All rights reserved. doi:10.1016/S0925-9635(02)00283-2 Optimisation of junction termination extension for the development of a 2000 V planar 4H–SiC diode R. Perez *, N. Mestres , X. Jorda , P. Godignon , J. Pascual a, a b b c ´ ` Institut Ciencia de Materials de Barcelona, ICMAB-CSIC, Campus UAB 08193 Bellaterra, Spain a ` Institut de Microelectronica de Barcelona, CNM-CSIC, Campus UAB 08193 Bellaterra, Spain b ` Departament de Fısica, Universitat Autonoma de Barcelona, Campus UAB 08193 Bellaterra, Spain c ´ ` Abstract The device structure of a 2 kV 4H–SiC P NN planar diode with different edge terminations is optimised with simulation q q results. Since the periphery protection is a key issue in the design of Silicon carbide (SiC) power diodes, several techniques such as single- and double-junction termination extension (JTE) and a combination of JTE and guard rings (GRs) have been studied. The MEDICI simulator has been used, including specific parameters for 4H–SiC. In the single implanted zone JTE, the breakdown is strongly dependent upon the dose of dopants introduced into the edge region. We find that a depletion of the surface doping effectively reduces the surface electric field up to 40%. To widen the range of optimum JTE parameters keeping technological simplicity in mind, we have studied the behaviour of double JTE structures. Another investigated periphery protection, consist to form a series of GRs embedded in a JTE structure, with this protection the diode achieves more ideal efficiency of breakdown capabilities.  2002 Elsevier Science B.V. All rights reserved. Keywords: Silicon carbide; Simulation; High power electronics; Implantation 1. Introduction Silicon carbide (SiC) as a base material for high frequency, high temperature and high power semi- conductor devices has demonstrated its great potential over the past recent years. The physical background of this potential is given by the intrinsic material properties of SiC such as wide band gap, high critical electric field, good carrier mobility and excellent thermal con- ductivity. Important for power devices, the 10= increase in critical electric field of SiC allows high voltage blocking layers to be approximately 10= thinner than Si based devices, thus reducing the device on-resistance and power losses while maintaining the same high voltage blocking capability. Unfortunately, breakdown voltages for planar junc- tions suffer from an acute reduction due to the well known device edge field crowding effect w1x, limiting the potential performance of SiC power devices. Devel- *Corresponding author. Tel.: q34-93-5801853; fax: q34-93- 5805729. E-mail address: rperez@icmab.es (R. Perez). ´ opment of proper edge termination to alleviate this effect is an actual research field. Several different edge termination methods for SiC planar junction have been investigated, involving field plates, floating guard rings (GRs), junction termination extensions (JTE) w2x, junc- tion bevelling (mesas) w3x, or mesa-JTE’s w4x. In this paper we investigate the critical design para- meters for 4H–SiC JTE techniques through a calibrated simulation program, while taking into account the unique processing constraints of SiC. The results are also extended to a new concept for the junction termi- nation structure which consist in a combination of JTE and GRs. 2. Simulation setup Numerical device simulations were performed using the commercial program MEDICI, from Avant Corpo- ration. The accuracy of the theoretical calculations is dependent upon the values used for the material para- meters required in the device models. We use the most recently published model parameters for 4H–SiC to obtain the closest agreement with the experimental data