Int. J. Electronic Security and Digital Forensics, Vol. 5, Nos. 3/4, 2013 241 Copyright © 2013 Inderscience Enterprises Ltd. Wavelet-transform steganography: algorithm and hardware implementation Bassam J. Mohd*, Thaier Hayajneh and Ahmad Nahar Quttoum Computer Engineering Department, Hashemite University, P.O. Box 150459, Zarqa, Jordan E-mail: bassam@hu.edu.jo E-mail: thaier@hu.edu.jo E-mail: quttoum@hu.edu.jo *Corresponding author Abstract: Steganography is a powerful method to conceal the existence of secret data inside a cover object. The concealment steps are performed in the spatial domain and/or the transform domain such as wavelet transform. While it is harder to detect, the transform domain steganography involves complex computations. Hence implementing steganography in hardware improves the steganography system performance. The preservation of the entire secret information is one of the main challenges for the transform domain steganography. Errors, introduced by quantisation steps, destroy some of the embedded secret bits. In this paper, we present a novel algorithm to embed and extract the entire secret data in the Haar wavelet-based transform without any secret information loss. This is accomplished by special clipping mechanism as well as modifying the placement of the secret bit in the transform coefficients. The algorithm is implemented in an FPGA-based hardware, and its performance metrics are examined including resources utilisation, power, timing and energy. Keywords: security; data security; image processing; very-large-scale integration; field programmable gate arrays; digital signal processors; steganography; wavelet-transform; hardware implementation. Reference to this paper should be made as follows: Mohd, B.J., Hayajneh, T. and Quttoum, A.N. (2013) ‘Wavelet-transform steganography: algorithm and hardware implementation’, Int. J. Electronic Security and Digital Forensics, Vol. 5, Nos. 3/4, pp.241–256 Biographical notes: Bassam J. Mohd received his BS in Computer Engineering from the KFUPM of Dhahran-KSA, his MS in Computer Engineering from the University of Louisiana at Lafayette and his PhD from the University of Texas-Austin, 2008. He has worked for several semiconductor companies including Intel, SUN, Synopsys and Qualcomm. He is currently an Assistant Professor at the Hashemite University, Jordan. His research interest includes DSP designs, steganographic processors, encryption processors and power reduction/estimation techniques. Thaier Hayajneh received his PhD and MSc in Computer and Network Security from the University of Pittsburgh, PA, USA in 2009 and 2005, respectively. He also received his MSc and BSc in Electrical and Computer Engineering from Jordan University of Science and Technology, Irbid, Jordan, in 1999 and 1997,