Power Amplifier Design for DECT Applications C. Liolios, C. Chaikalis Department of Electronics & Communications University of Bradford Bradford, United Kingdom Email: cliolios@ieee.org, c.chaikalis@ieee.org Abstract --- Power amplifier design represents an important issue in modern wireless communications systems: the design objective is to achieve maximum transducer gain. For DECT cordless system (operating frequency 850 – 950 MHz) and a center frequency of 900 MHz we design a power amplifier according to the desired specifications (gain > 26 dB and input/output return losses < -15 dB). For the construction part we choose FET transistors: the operating points for each transistor are evaluated to get the desirable gain and output power. After checking the stability of the selected devices, we design the input, output and interstage matching networks. Finally, we produce the PCB circuit and our simulation results show an overall gain higher than 26 dB and losses less than -15 dB. The designed power amplifier exhibited efficiency significantly higher than conventional power devices. I. INDRODUCTION The European private mobile radio standard Digital Enhanced Cordless Telecommunication (DECT) is now rapidly conquering the telecommunications world. DECT has proven multiple applicability as a network access in residential, business and public environments showing easy mobility, speech quality comparable to wire line telephony, a high level of security through advanced digital technology and encryption, allowing for high subscriber densities, flexible bandwidth allocation, multiple service support, cost competitiveness, flexible deployment and simple installation [1]. DECT operating frequency is between 850 and 950 MHz and one of its main features is high speech quality: the key factor to achieve excellent speech transmission and reception is signal amplification. Power amplifier design represents the primary focus on wireless communication systems design. An efficient way for signal amplification is to get the speech signal through a power amplifier in order to obtain the desirable power level. This paper presents a three stages fully integrated (no external components required) 900 MHz power amplifier chain, fabricated using Microwave Office software, as well as GaAs MESFET technology. The paper is organized as follows: section 1 gives an overview of the theoretical background required, while section 2 presents the guidelines for the design of the power amplifier. In section 3 simulation results are illustrated, whereas section 4 focus on implementation and testing issues of the power amplifier. Finally, we conclude in section 5. II. THEORETICAL BACKGROUND A. Specifications and transistors selection TABLE I. SYSTEM SPECIFICATIONS Center Frequency 900 MHz Bandwidth 100 MHz Input power -20 to 0 dBm Gain > 26 dB Input return losses < -15 dB Output return losses < -15 dB System specifications are shown in Table 1. There are two methods to design our system: • In the first one the design consists of three separate stages; each of them will include one power transistor and will be matched to 50 . • In the second method we implement a fully integrated power amplifier, which will comprise three stages connected to each other. The first stage gives more linear gain, the second is the driver stage and the last one is the power amplifier stage that delivers the power to the load. The last method is called “power amplifier chain” and represents the selected method to design our system. The reason is that this method works better even when one or more of the driver stages appear to be working at a similar relative level of gain compression or power backoff, as the final power amplifier stage [2]. G AIN D RIVER PA Fig. 1. Power amplifier chain method