Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip Damien Lyonnard Sungjoo Yoo Amer Baghdadi Ahmed A. Jerraya SLS Group, TIMA Laboratory 46 Avenue F´ elix Viallet, 38031 Grenoble, France Damien.Lyonnard,Sungjoo.Yoo,Amer.Baghdadi,Ahmed.Jerraya @imag.fr Abstract We present a design flow for the generation of application-specific multiprocessor architectures. In the flow, architectural parame- ters are first extracted from a high-level system specification. Pa- rameters are used to instantiate architectural components, such as processors, memory modules and communication networks. The flow includes the automatic generation of communication copro- cessor that adapts the processor to the communication network in an application-specific way. Experiments with two system exam- ples show the effectiveness of the presented design flow. 1. Introduction. To accommodate the ever increasing performance requirements of application domains such as xDSL, networking, wireless, game applications, etc., multiprocessor SoCs are more and more required. Such multiprocessor systems should be specific to each of the ap- plication domains in the following aspects: Kinds of (application-specific) processor: Ps, DSPs, ASIPs, and coprocessors (DCT, Viterbi decoder, etc.). Communication components: memory (e.g. multi-bank mem- ory [8][19], special stream buffers [10]), peripherals [20], etc. Communication networks: shared bus [15][18][23], circuit switching [16], packet switching [9], etc. As the multiprocessor architectures require heterogeneous pro- cessors (for application-specific optimization), high-performance complex communication networks [9] [17] and sophisticated communication protocols [24] (e.g. broadcasting, multi-master buses, etc.), architecture generation demands significant design ef- forts. Unfortunately, for the architecture generation, current de- sign practices allow only limited automation [3][26] and, for most parts, designers resort to manual architecture design, which is time- Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. DAC 2001, June 18-22, 2001, Las Vegas, Nevada, USA. Copyright 2001 ACM 1-58113-297-2/01/0006 ...$5.00. consuming and error-prone. Such a manual process can hardly afford design space exploration in heterogeneous multiprocessor architectures design. In our work, we aim at automating the architecture generation step. To do that, the architecture is generated from a high-level system description thereby freeing the designer from the interface details required for the architecture design. Thus, the automation enables the designer to focus on more valuable design decisions such as processor/communication component allocation and be- havior/communication mapping/scheduling in multiprocessor ar- chitectures. In our work, the architecture generation is based on instantiation of generic multiprocessor architecture templates and on the automatic generation of communication coproces- sors. This paper is organized as follows. In Section 2, we give a review of architecture generation for multiprocessor systems. We explain generic architecture templates and communication copro- cessors in Section 3. In Section 4, we introduce our design flow and describe the high-level system specification for architecture generation. In Section 5, we address the architecture generation flow. In Section 6, we give experimental results. The design flow is evaluated in Section 7 before concluding in Section 8. 2. Previous Work. The main difference between classical multiprocessor architec- tures [5] and multiprocessor SoC architectures is that the multi- processor SoC architectures have specific applications while the classical architectures have general purposes. This means that the two kinds of architecture are significantly different. In SoC multi- processor architecture, since the specific application has tight de- sign constraints (e.g. low area and power consumption and high performance), application-specific optimization of the architecture is necessary. Thus, we have to use various kinds of processors (to use a processor specific to the application, e.g. usage of a DSP for voice processing) and the communication networks can not have regular structures (from one application to another) to meet the application-specific requirements of communication (e.g. circuit switch network in multimedia applications and CAN bus in auto- motive applications). The multiprocessor architecture is also different from the con- ventional P/coprocessors architecture as illustrated in Figure 1, where communication between processors is based on master ( P)/ slave (coprocessors) relationship. Interfaces of coprocessors are