1556 IEEE ELECTRON DEVICE LETTERS, VOL. 33, NO. 11, NOVEMBER 2012 Investigation of One-Dimensional Thickness Scaling on Cu/HfO x /Pt Resistive Switching Device Performance Ming Wang, Hangbing Lv, Qi Liu, Yingtao Li, Zhongguang Xu, Shibing Long, Hongwei Xie, Kangwei Zhang, Xiaoyu Liu, Haitao Sun, Xiaoyi Yang, and Ming Liu Abstract—Scaling is a key issue for resistive switching (RS) memory before commercialization. In this letter, we reveal the impact of electrode diffusion on the device performance as the thickness of RS material scaled. Serious deterioration of on/off ratio and device yield was observed when the material thickness scaled below 3 nm. A new method of two-step electrode depo- sition accompanied with reoxidization process was employed to overcome this problem. Significant improvements of device per- formance such as forming free, low RESET current (∼1 μA), high on/off ratio (> 100), and 100% device yield were achieved thereafter. Index Terms—HfO x , resistive switching (RS), resistive random access memory (RRAM), scaling. I. I NTRODUCTION R ESISTIVE random access memory (RRAM) is a promis- ing candidate for next-generation nonvolatile memory application owing to its simple structure, fast switching speed, high on/off ratio, and high integration density [1]–[4]. However, there are several problems needed to be elucidated before taking it into consideration for practical application [5]–[7]; among which, scaling is one of the most inquisitive issues needing to be identified insistently [8], [9]. For the design of high density memory, the thickness of the resistive switching (RS) materials should be smaller than the lateral spacing between two neighboring memory cells in principle, particularly when the spacing scaled down to sub 10 nm. However, the thickness scaling issue in RRAM has not been intensively studied but definitely deserves some investigation, particularly when the thickness reaches to an ultimate value. It is commonly reported that there is a proportional relationship between the forming voltage and the RS material thickness [6], [10], [11]. A free- forming device can be expected when the thickness decreases Manuscript received July 2, 2012; revised July 30, 2012; accepted July 30, 2012. Date of publication September 13, 2012; date of current version October 19, 2012. This work was supported in part by the Ministry of Science and Technology of China under Grants 2011CBA00602, 2010CB934200, 2011CB921804, 2009CB925003, 2011CB707600, 2009CB623702, 2008AA031403, 2011AA010401, 2011AA010402, and 2009AA03Z306 and in part by the National Science Foundation of China under Grants 60825403, 61106119, 61106082, 50972160, 51071044, 60976003, and 61006011. The review of this letter was arranged by Editor D. Ha. The authors are with the Laboratory of Nano-Fabrication and Novel Devices Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China (e-mail: liuming@ime.ac.cn). Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2012.2211563 to a certain value [10]. In this letter, we study the 1-D thickness scaling of RRAM devices based on a Cu/HfO x /Pt structure and reveal that the electrode diffusion would seriously degrade the device performance when the HfO x material thickness approaches to an ultrathin value. In order to solve this problem, we then developed a two-step Cu electrode deposition and ox- idation process. The device performance was found improved significantly after this kind of treatment. RESET current as low as 1 μA, high on/off ratio of 100, and 100% device yield were achieved successfully. More importantly, the devices were still forming free. II. EXPERIMENTS Cu/HfO x /Pt devices were fabricated on a SiO 2 /Si substrate, where the HfO x with various thicknesses was grown by atomic layer deposition (ALD) and the Cu top electrode (TE) was deposited by electron-beam evaporation. Two-step Cu TE depo- sition and oxidation process means that, in the first step, a thin 3-nm Cu layer was deposited on HfO x first and then annealed at 210 ◦ C for 90 s in oxygen ambient. In the second step, a thick 70-nm Cu layer was deposited and patterned as TE by a conventional lithography process. Finally, square devices with a side length of 5 μm were fabricated. The depth distributions of Cu, Hf, and O elements in HfO x film and their chemical states were analyzed by an X-ray photoelectron spectroscope (XPS). The electrical characteristics of the device were measured by a Keithley 4200 semiconductor parameter analyzer, where the bias voltage was applied to the Cu TE with the Pt bottom electrode grounded. III. RESULTS AND DISCUSSION For the pristine Cu/HfO x /Pt device with a thickness of HfO x film more than 5 nm, a forming process is necessary to initiate the bipolar resistance switch. The inset of Fig. 1(a) shows the typical current–voltage (I –V ) curves of the forming process for the devices with various HfO x thicknesses. The forming voltages are proportional to the HfO x thickness, as shown in Fig. 1(a). It should be noted that, when the HfO x thickness scaled down to 3 nm or below, the initial resistance of the device was reduced by about five orders of magnitudes. Moreover, many pristine devices were found shorted and could not be switched to high-resistance state (HRS). To explore this reason, the profile of Cu element distribution in HfO x film was inves- tigated by in-depth XPS analysis, as shown in Fig. 1(b). The 0741-3106/$31.00 © 2012 IEEE