Volume inversion mobility in SOI MOSFETs for different thin body orientations V. Sverdlov * , E. Ungersboeck, H. Kosina, S. Selberherr Institute for Microelectronics, TU Vienna, Gusshausstr. 27–29, A-1040 Vienna, Austria The review of this paper was arranged by Raphae ¨l Clerc, Olivier Faynot and Nelly Kernevez Abstract Low field mobility in double- and single-gate structures is analyzed for (1 0 0) and (1 1 0) SOI substrate orientation. A Monte Carlo algorithm for vanishing driving fields allows the calculation of the mobility for arbitrary scattering rates and band structure without fur- ther approximations. Due to volume inversion, mobility in double-gate ultra-thin body (1 1 0) SOI FETs is enhanced in comparison with the mobility of single-gate structures in the whole effective field range. In double-gate (1 0 0) structures the mobility decreases below the single-gate value for high effective fields. It is argued that the twice as high carrier concentration in double-gate FETs causes significant occupation of higher subbands, where mobility is low, and that additional inter-subband scattering channels for the lowest subband are opened. These effects partly compensate the mobility enhancement due to volume inversion and lead to a mobility decrease in double- gate (1 0 0) structures. Ó 2007 Elsevier Ltd. All rights reserved. Keywords: Double-gate MOSFETs; Volume inversion; Mobility; Monte Carlo simulations 1. Introduction Due to aggressive downscaling of transistor feature-size the role of parasitic short-channel effects in bulk MOS- FETs is rapidly increasing, prompting for an introduction of alternative MOSFET architectures. Double-gate (DG) silicon-on-insulator (SOI) transistors with ultra-thin Si body (UTB) are considered to be good candidates for the far-end ITRS roadmap scaling [1]. Excellent electrostatic channel control in DG operation is theoretically predicted and allows scaling of the MOSFET’s channel length down to 2.5 nm [2], maintaining reasonable subthreshold slope, satisfactory DIBL, and acceptable gain. Despite the extensive experimental data available on mobility behavior in UTB FETs in DG and single-gate (SG) operation mode as well as the vast number of simula- tions for either SG or DG structures, a comparative theo- retical analysis of mobility behavior in SG and DG FETs is limited to a few publications dealing exclusively with (1 0 0) SOI orientation [3,4]. Such an analysis is desirable due to an existing discrepancy between the mobility measurements and theoretical predictions for (1 0 0) UTB SOI FETs. At high effective fields the mobility measured in DG structures is smaller than the SG mobility [5], although an enhance- ment due to bulk inversion would be anticipated [6]. According to the volume inversion concept, in DG structures the inversion layers initially located at the oppo- site SOI interfaces intersect, leading to a charge maximum in the middle of the UTB. The charge is further away from the two rough interfaces, which eventually results in a mobility increase. Mobility behavior consistent with the bulk inversion concept was recently confirmed experimen- tally [7] in (1 1 0) UTB FETs: the DG mobility was higher than the SG mobility in the whole range of concentrations. In order to explain the observed behavior one has to theo- retically compare the mobility behavior in SG and DG 0038-1101/$ - see front matter Ó 2007 Elsevier Ltd. All rights reserved. doi:10.1016/j.sse.2007.01.022 * Corresponding author. E-mail address: sverdlov@iue.tuwien.ac.at (V. Sverdlov). www.elsevier.com/locate/sse Solid-State Electronics 51 (2007) 299–305