Understanding reversal effects of metallic aluminum introduced in HfSiON/TiN PMOSFETs S. Baudot a,⇑ , C. Leroux b , F. Chave a , R. Boujamaa a , E. Martinez b , P. Caubet a , M. Silly c , F. Sirotti c , G. Reimbold b , G. Ghibaudo d a STMicroelectronics, 850, rue Jean Monnet, 38926 Crolles cedex, France b CEA-LETI Minatec Campus, 17, rue des Martyrs, 38000 Grenoble, France c Synchrotron SOLEIL, L’orme des merisiers, 91191 Gif-sur-Yvette, France d IMEP-LAHC, 3, Parvis Louis Néel, 38016 Grenoble, France article info Article history: Available online 30 March 2011 Keywords: Aluminum High-k Dipole Flatband voltage Metal gate work function abstract We evaluate the insertion of metallic aluminum in TiN metal gate over HfSiON/SiON for a gate first CMOS integration with an equivalent oxide thickness of 15 Å. From capacitance versus voltage measurements, we report for the first time a non-linear Vfb shift associated to aluminum thickness variation (a). To understand this observation the metal gates have been reproduced on various dielectric stacks having either (b) beveled SiON or (c) 150 Å HfSiO. From beveled samples we extract the effective work function, which presents the same variations with aluminum thickness as in nominal devices (a). Aluminum dif- fusion at the bottom high-k interface is prevented in samples (c) thanks to thick HfSiO and leads to a neg- ative Vfb shift. We conclude that the observed reversal shifts with metallic aluminum thickness in TiN are due to a +50 mV aluminum induced dipole at the HfSiON/SiON interface associated to an opposite metal work function decrease. Ó 2011 Elsevier B.V. All rights reserved. 1. Introduction TiN and HfSiON are commonly used as metal and high-k gate materials for CMOS 32 nm node and beyond. However, they lead to high threshold voltage on both N and P MOSFETs. A solution for P MOSFETs is to increase the flat band voltage Vfb by introduc- ing Al 2 O 3 in the gate. A 0.6 V shift has been measured by using Al 2 O 3 as high-k dielectric, in contact with SiO 2 gate oxide layer [1]. Deposition of aluminum as Al 2 O 3 above the high-k layer has also been proposed to shift Vfb by 0.2 V [2]. This results from a volt- age drop at the high-k/SiO 2 interface and the metal intrinsic work function change [3]. However, a dramatic 100 mV decrease of Vfb shift has also been observed while scaling down the equivalent oxide thickness EOT. This phenomenon is called ‘‘roll-off’’ and de- pends on each metal/oxide layer physical properties [4]. This low- ers the benefits of aluminum incorporation for the targeted EOT in the 32 nm node. In this paper, we evaluate insertion of metallic aluminum in the TiN gate on Vfb shift at 15 Å EOT. Vfb shifts as well as interface trap charge creation are investigated for various alumi- num and dielectric thicknesses to understand their origin: charge, intrinsic work function change or dipole effects. Complementary chemical analysis has also been carried out to better understand the physical origin of the observations. 2. Experimental We have compared different metal gates containing 0, 2, 4, 6, 8 Å aluminum deposited by PVD and inserted between 10 and 90 Å TiN. The gate first integration scheme is described in Fig. 1. The different metal gates have been produced for three types of high-k and SiON thicknesses. (a) Nominal samples have 13 Å SiON and 20 Å HfSiON. PMOS devices have been achieved by a state-of- the-art industrial process flow including metal interconnects. (b) Beveled samples have a SiON varying from 10 to 90 Å and are capped with 20 Å HfSiON layer. The SiON thickness variation on each wafer is performed by a SiO 2 wet etching followed by nitrid- ation and anneal. Residual SiON thickness has a radial profile, decreasing from wafer’s center to wafer’s edge at 1 Å/mm constant rate and yielding to a negligible variation on 100 lm width de- vices. (c) Thick high-k samples have 13 Å SiON and 150 Å HfSiO. MOS capacitors have been patterned on b and c samples following a simplified process flow. All samples have been measured by CV to extract Vfb and EOT using method described in [5]. To compare only metal/oxide stacks we subtract substrate Fermi level from Vfb and thus define a dVfb as: 0167-9317/$ - see front matter Ó 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2011.03.124 ⇑ Corresponding author. Tel.: +33 4 38 92 37 25; fax: +33 4 38 92 36 81. E-mail address: sylvain.baudot@st.com (S. Baudot). Microelectronic Engineering 88 (2011) 1305–1308 Contents lists available at ScienceDirect Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee