Charging effects in silicon nanocrystals embedded in SiO 2 films D.N. Kouvatsos *, V. Ioannou-Sougleridis, A.G. Nassiopoulou Institute of Microelectronics/NCSR ‘Demokritos’, P.O. Box 60228 Aghia Paraskevi, Athens 15310, Greece Abstract Structures with Si nanocrystals embedded in SiO 2 were fabricated by growing thin oxides and depositing Si films by low pressure chemical vapor deposition (LPCVD), followed by 900 8C oxidation and anneal at 900 8C or 1100 8C, forming nanocrystal layers of three expected thickness between 1 and 6 nm. The charge trapping, determined from the hysteresis DV of capacitance  /voltage (C / V ) curves from inversion to accumulation and back, depended on the nanocrystal size. For structures with the largest nanocrystals annealed at 900 8C, C  /V sweeps increasing into accumulation showed abrupt DV increase and forward C  /V curve translation at fields above 2.5 MV cm 1 , indicating charging mainly above this field with partial charge retention. Similar structures annealed at 1100 8C showed gradual charging with increasing field; with increasing sweeps DV now increased linearly with end voltage, possibly because of increased contribution of oxide defects to trapping. Very small DV of 0.1 /0.2 V was measured for the two smaller nanocrystal sizes. The current  /voltage (I /V ) curves show N-shaped behavior indicating screening effects due to charging; an initial current spike, attributed to transient current charging the nanocrystals, occurs at the voltage causing abrupt forward C /V curve shift and DV increase, with Fowler  /Nordheim current rising at higher voltages. These results support the conclusion that charge trapping occurs primarily in Si nanocrystals, with an increasing contribution of trapping in oxide defects in structures processed at higher temperature. # 2003 Elsevier Science B.V. All rights reserved. Keywords: Silicon nanocrystals; Charge trapping; Memory effects 1. Introduction The use of low-dimensional silicon structures such as silicon nanocrystals in devices is an area of intensive research in recent years. Particularly, much interest has arisen in structures containing silicon nanocrystals embedded in a dielectric matrix due to the unique properties of such systems. Fabrication of these struc- tures has been performed by utilizing low pressure chemical vapor deposition (LPCVD) [1  /4], which is the method most used in a standard CMOS fabrication procedure, but also with low-energy ion implantation [5  /8], sputtering or plasma enhanced CVD [9] or, especially in the earlier efforts, by electron beam evaporation [10] or molecular beam epitaxy [11]. Interest in low-dimensional silicon structures, after the first observation of light emission from porous silicon [12], initially focused mainly on the study of luminescence, aimed at developing silicon based light emitting device applications [3,4,12,13]. However, the electrical proper- ties of these structures eventually generated even more interest, resulting in the pursuit of novel nanoelectronic device applications. Such devices of particular interest today, having potential for use in future ULSI inte- grated circuits, are single electron transistors and memories utilizing silicon nanocrystals, preferably fab- ricated by using a fully CMOS-compatible process, as charge storage elements [6,7,10,14,15]. In recent years, important research developments in this direction are devices exhibiting memory effects for non-volatile RAM applications, which are based on threshold voltage shifts because of the presence of nanocrystals in the gate dielectric of field effect transis- tors [5,7,8] or on effects due to electron or hole charging of nanocrystals embedded in the dielectric of MOS capacitors [6,8]. To facilitate these applications, it is of great significance to achieve a better understanding of the charge trapping processes in structures having dielectric films containing silicon nanocrystals. * Corresponding author. Tel.:  /30-106-503-266; fax:  /30-106-511- 723. E-mail address: d.kouvatsos@imel.demokritos.gr (D.N. Kouvatsos). Materials Science and Engineering B101 (2003) 270  /274 www.elsevier.com/locate/mseb 0921-5107/03/$ - see front matter # 2003 Elsevier Science B.V. All rights reserved. doi:10.1016/S0921-5107(02)00695-5