Fitness Functions for the Unconstrained Evolution of Digital Circuits T¨ uze Kuyucu, Martin Trefzer, Andrew Greensted, Julian Miller and Andy Tyrrell Abstract— This work is part of a project that aims to develop and operate integrated evolvable hardware systems using unconstrained evolution. Experiments are carried out on an evolvable hardware platform featuring both combinatorial and registered logic as well as sequential feedback loops. In order to be able to accurately assess the transient output of the system and at the same time speed up evolution, new fitness evaluation methods are introduced. These bitwise and hierarchical fitness evaluation methods are adapted and further developed specifically for hardware implementation. It is shown that the newly developed approaches are particularly powerful in coping with two important issues: computational ambiguities, which generally occur when evaluating binary strings, and transient effects resulting from measuring hardware output. On two combinatorial problems it is shown that the new fitness functions improve the performance of evolution and allow stable solutions to be found more reliably. The experiments are carried out with a recently developed hardware platform called reconfigurable integrated system array (RISA). I. I NTRODUCTION The range of tasks, to which evolutionary computation is successfully applied, is constantly becoming broader and evolutionary systems are becoming more complex and com- putationally intensive. It is inevitable that this rise in com- plexity will increase, in order to build more generic and smarter applications. However, these systems depend on great computational power, which can only be provided by large parallel computing systems. Approaches that are particularly computationally expensive are, for instance, genetic program- ming (GP) [14], [15], [17], [18], [20], where the growth of the variable length genotype is not limited, and those, where complex genotype-phenotype mapping or fitness evaluation is implemented. [7], [19] are examples where the latter two problems are addressed. If an evolvable device is desired, which can be operated in the field as part of an autonomous system, the previously mentioned approaches will no longer be suitable. Some of them will even be impossible to include in a system that is bound to limited resources and has to cope with unknown environments. As a consequence of this, it be- comes equally important to develop powerful and evolvable integrated systems, i.e. systems on a chip, which contain all the constituents of an evolutionary system—hardware and software—and therefore enable adaptivity to previously T¨ uze Kuyucu, Martin Trefzer, Andrew Greensted, Julian Miller and Andy Tyrrell are with the Department of Electronics, Intelligent Systems Group, University of York. {tk519, mt540, ajg112, jfm7, amt}@ohm.york.ac.uk, http://www.bioinspired.com. The authors would like to thank James Walker for his contributions on the HIFF fitness evaluation method. This work is part of a project that is funded by EPSRC - EP/E028381/1. unknown environments, fault tolerance and autonomous be- haviour. In order to achieve this, it is necessary to develop efficient and resource saving architectures and algorithms, which are suitable to be integrated in hardware and are at the same time sufficiently powerful in solving complex tasks. As yet, there are only a few examples where the entire evolvable system has been realized as system on a chip, e.g. [5], [6], [10], [16]. In most cases, the presence of a high-level controller, carrying out the evolutionary algorithm (EA) and managing the population is required. This work is part of a project that aims to develop and operate this kind of evolvable and developmental system. In order to achieve this, an important task will be the development of efficient algorithms, which are suitable to be integrated in systems on a chip. Therefore, as a first step, generic fitness evaluation methods have been adapted and developed with consideration for implementing them in hardware. Two novel fitness functions have been imple- mented: the first one, which is particularly suitable to address transient effects resulting from measuring real hardware is an extension to the traditional bitwise fitness calculation (hamming-distance), and is referred to as the bitwise modi- fied for hardware (BMH) method. The second custom fitness evaluation method that has been developed is inspired by the HIFF method, described in [22]. It is based on sampling the bit string by evaluating blocks of bits of variable size and is therefore referred to as hierarchical bit-string sampling (HBS). The main focus of this paper is on finding efficient fitness evaluation methods, which allow for accurately as- sessing transient effects of real hardware systems that include feedback. As yet, to the authors’ knowledge, feedback is most often not included in the evolution of digital circuits, although it should yield interesting results. In this case, the term feedback refers to circuits that feature the ability to oscillate rather than being merely finite sequential circuits: examples for this can be found in [12], [21]. Hence, feedback is enabled in the experiments presented in this paper, and, as a consequence of this, the additional challenge to the EA is to find a static solution in a transient dynamic system. If a suitable fitness evaluation method is found, which is able to accurately assess and control transient effects, it will be suitable for both the evolution of static and dynamic circuits. Due to the considerably high complexity of these kinds of systems, the XOR is chosen as a relatively basic, but representative task. The performance of all four fitness functions, namely bitwise, BMH, HIFF and HBS, is pre- sented. Additionally, a 4 bit parity generator is evolved to