Techniques for very low-voltage operation of continuous-time analog CMOS circuits Jaime Ramirez-Angulo 1 , Ramon Gonzalez-Carvajal 2 and Antonio Lopez-Martin 3 1 New Mexico State University, 2 Escuela Superior de Ingenieros , 3 Universidad Publica de Navarra jramirez@nmsu.edu carvajal@gte.esi.us.es antonio.lopez@unavarra.es Abstract In this paper some techniques for continuous- time operation of low-voltage analog CMOS circuits are revisited These are based on the utilization of static, dynamic and switched floating voltage sources, on floating and quasi- floating gate transistors and on a versatile cell denoted flipped voltage follower. Circuits based on these techniques operate with a single supply voltage close to a transistor's threshold voltage 1. Introduction Within the next few years most mixed-signal systems will operate with sub-volt supply voltages (VDD<1V). This trend has various motivations: a) to reduce power dissipation in the dominant digital part of a mixed-signal system. Dynamic power dissipation of a digital system is known to depend on VDD 2 , b) to comply with lower oxide breakdown voltages and to maintain low leakage currents in fine line CMOS technology and c) to reduce volume, weight and extend battery life in wireless applications. The reduction in the supply voltages of CMOS VLSI systems is diverting analog designers from conventional circuit architectures [1]. Most of these have very poor performance and/or become non functional at all in a low voltage supply environment. Innovative techniques for the design of low-voltage, high performance analog CMOS circuit are required for the new generations of deep sub-micrometer fine line CMOS technologies. In spite of the fact that very efficient techniques are already available for low-voltage switched capacitor circuits [2][3] relatively few techniques have been reported for continuous-time circuits. In this paper three main approaches for designing high performance continuous-time low-voltage analog CMOS circuits are revisited. These are based: a) on static, dynamic and switched floating voltage sources, b) on floating and quasi-floating gate transistors and c) on a versatile cell denoted flipped voltage follower. These circuits operate in all cases with a single supply voltage close to a transistor's threshold voltage and with large signal swings. We refer to low-voltage circuits as those that operate from a single supply voltage VDD less than the sum of the threshold voltages of a PMOS and an NMOS transistor: VDD<VTn+|VTp| and with input and output signal swings comparable to VDD. In the following three sections we discuss each approach and applications. Some applications have been already reported and some are new. Vb Vb + _ _ + + _ + _ Vout Vout Vin Vin ( a ) ( b ) Vb R A B I I A B I1 I1+I2 ( c ) ( d ) A B Vb C C 1 1 2 2 B A ( e ) Fig. 1. (a) Conventional cascode current mirror (b) Low-voltage cascode mirror with DC level shifters (c ) Passive Implementation of Vb (d) Active implementation of Vb (e) dynamic implementation of Vb. 2. Floating voltage sources IIa Static floating sources. Fig. 1a shows a conventional cascode current mirror. It has Proceedings of the 17th International Conference on VLSI Design (VLSID’04) 1063-9667/04 $ 20.00 © 2004 IEEE