Journal of VLSI Signal Processing 28, 7–27, 2001 c ° 2001 Kluwer Academic Publishers. Manufactured in The Netherlands. Reconfigurable Computing for Digital Signal Processing: A Surv ∗ RUSSELL TESSIER AND WAYNE BURLESON Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA 01003 Received July 1999; Revised December 1999 Abstract. Steady advances in VLSI technology and design tools have extensively expanded the applicatio main of digital signal processing over the past decade. While application-specific integrated circuits (ASICs) and programmable digital signal processors (PDSPs) remain the implementation mechanisms of choice for m applications, increasingly new system implementations based on reconfigurable computing are being co These flexible platforms, which offer the functional efficiency of hardware and the programmability of so quickly maturing as the logic capacity of programmable devices follows Moore’s Law and advanced auto sign techniques become available. As initial reconfigurable technologies have emerged, new academic and comm cial efforts have been initiated to support power optimization, cost reduction, and enhanced run-time pe This paper presents a survey of academic research and commercial development in reconfigurable com DSP systems over the past fifteen years. This work is placed in the context of other available DSP implementation media including ASICs and PDSPs to fully document the range of design choices available to system eng It is shown that while contemporary reconfigurable computing can be applied to a variety of DSP application video, audio, speech, and control, much work remains to realize its full potential. While individual implementations of PDSP, ASIC, and reconfigurable resources each offer distinct advantages, it is likely that integrated c of these technologies will provide more complete solutions. Keywords: signal processing, reconfigurable computing, FPGA, survey 1. Introduction Throughout the history of computing, digitalsignal processing applications have pushed the limits of com- pute power, especially in terms of real-time compu- tation.While processed signals have broadly ranged from media-driven speech, audio,and video wave- forms to specialized radar and sonar data, mostcal- culations performed by signal processing systems have exhibited the same basic computational characteristics. The inherent data parallelism found in many DSP func- tions has made DSP algorithms ideal candidates for hardware implementation, leveraging expanding VLSI capabilities. Recently, DSP has received increased at- ∗ This article is abridged from the forthcoming Marcel Dekker, Inc. publication, Programmable Digital Signal Processors, Y. Hu, editor. tention due to rapid advancements in multimedia com- puting and high-speed wired and wireless communi- cations. In response to these advances, the search for novel implementations of arithmetic-intensive circuitry has intensified. While application areas span a broad spectrum, the basic computational parameters of most DSP opera- tions remain the same: a need for real-time perfor- mance within the given operational parameters of a target system and, in mostcases, a need to adapt to changing data sets and computing conditions. In gen- eral, the goal of high performance in systems ranging from low-cost embedded radio components to special- purpose ground-based radar centershasdriven the development of application and domain-specific chip sets.The development and financial cost of this ap- proach is often large, motivating the need for new